component
DG411DY-E3
Public Made by Adomby adom
Vishay Intertech Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDG411DY-E3
Vishay Intertech · Analog Switches, Multiplexers · SOIC-16
DG411DY-E3 from Vishay Intertech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | Digital control input for switch 1; logic 0 is 0.8 V maximum and logic 1 is 2.4 V minimum, TTL/CMOS compatible. |
| 2 | D1 | passive | Drain terminal of switch 1; signals exceeding V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum rating. |
| 3 | S1 | passive | Source terminal of switch 1; analog signal range is ±15 V with ±15 V supplies. |
| 4 | V- | power_in | Negative supply; V+ to V- absolute maximum is 44 V and GND to V- absolute maximum is 25 V. |
| 5 | GND | power_in | Ground reference; GND to V- absolute maximum is 25 V. |
| 6 | S4 | passive | Source terminal of switch 4; analog signal range is ±15 V with ±15 V supplies. |
| 7 | D4 | passive | Drain terminal of switch 4; signals exceeding V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum rating. |
| 8 | IN4 | input | Digital control input for switch 4; logic 0 is 0.8 V maximum and logic 1 is 2.4 V minimum, TTL/CMOS compatible. |
| 9 | IN3 | input | Digital control input for switch 3; logic 0 is 0.8 V maximum and logic 1 is 2.4 V minimum, TTL/CMOS compatible. |
| 10 | D3 | passive | Drain terminal of switch 3; signals exceeding V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum rating. |
| 11 | S3 | passive | Source terminal of switch 3; analog signal range is ±15 V with ±15 V supplies. |
| 12 | VL | power_in | Logic supply; the absolute maximum range is (GND - 0.3) V to (V+) + 0.3 V. |
| 13 | V+ | power_in | Positive supply; V+ to V- absolute maximum is 44 V. |
| 14 | S2 | passive | Source terminal of switch 2; analog signal range is ±15 V with ±15 V supplies. |
| 15 | D2 | passive | Drain terminal of switch 2; signals exceeding V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum rating. |
| 16 | IN2 | input | Digital control input for switch 2; logic 0 is 0.8 V maximum and logic 1 is 2.4 V minimum, TTL/CMOS compatible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| V+ to V- | 44 | V | 2 | ||||
| GND to V- | 25 | V | 2 | ||||
| Continuous Current (Any terminal) | 30 | mA | 2 | ||||
| Peak Current, S or D | 100 | mA | Pulsed at 1 ms, 10 % duty cycle | 2 | |||
| Storage Temperature (DY suffix) | -65 | 125 | °C | DJ, DY suffix | 2 | ||
| Power Dissipation, 16-pin narrow SOIC | 600 | mW | Derate 7.6 mW/°C above 75 °C | 2 | |||
| Supply voltage, unipolar single supply | 5 | 44 | V | Single supply operation, V- tied to 0 V | 8 | ||
| Operating Temperature (D suffix) | -40 | 85 | °C | Temp. range for DY package | 2 | ||
| Analog Signal Range (±15 V supplies) | VANALOG | -15 | 15 | V | 3 | ||
| Drain-Source On-Resistance RDS(on) Room 25 °C (±15 V) | RDS(on) | 25 | 35 | Ω | V+ = 13.5 V, V- = -13.5 V, IS = -10 mA, VD = ±8.5 V | 3 | |
| Drain-Source On-Resistance RDS(on) Full (±15 V) | RDS(on) | 45 | Ω | V+ = 13.5 V, V- = -13.5 V, IS = -10 mA, VD = ±8.5 V | 3 | ||
| Switch Off Leakage Current Room 25 °C (±15 V) | IS(off) | -0.25 | 0.1 | 0.25 | nA | V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V | 3 |
| Switch Off Leakage Current Full (±15 V) | IS(off) | -5 | 5 | nA | V+ = 16.5 V, V- = -16.5 V, VD = ±15.5 V, VS = ±15.5 V | 3 | |
| Drain Off Leakage Current Room 25 °C (±15 V) | ID(off) | -0.25 | 0.1 | 0.25 | nA | 3 | |
| Drain Off Leakage Current Full (±15 V) | ID(off) | -5 | 5 | nA | 3 | ||
| Channel On Leakage Current Room 25 °C (±15 V) | ID(on) | -0.4 | 0.1 | 0.4 | nA | V+ = 16.5 V, V- = -16.5 V, VS = VD = ±15.5 V | 3 |
| Channel On Leakage Current Full (±15 V) | ID(on) | -10 | 10 | nA | V+ = 16.5 V, V- = -16.5 V, VS = VD = ±15.5 V | 3 | |
| Input Current, VIN Low | IIL | -0.5 | 0.005 | 0.5 | µA | VIN under test = 0.8 V, Full | 3 |
| Input Current, VIN High | IIH | -0.5 | 0.005 | 0.5 | µA | VIN under test = 2.4 V, Full | 3 |
| Turn-On Time Room 25 °C (±15 V) | tON | 110 | 175 | ns | RL = 300, CL = 35 pF, VS = ±10 V, see figure 2 | 3 | |
| Turn-On Time Full (±15 V) | tON | 220 | ns | RL = 300, CL = 35 pF, VS = ±10 V, see figure 2 | 3 | ||
| Turn-Off Time Room 25 °C (±15 V) | tOFF | 100 | 145 | ns | 3 | ||
| Turn-Off Time Full (±15 V) | tOFF | 160 | ns | 3 | |||
| Positive Supply Current Room 25 °C (±15 V) | I+ | 0.0001 | 1 | µA | V+ = 16.5 V, V- = -16.5 V, VIN = 0 V or 5 V | 3 | |
| Positive Supply Current Full (±15 V) | I+ | 5 | µA | V+ = 16.5 V, V- = -16.5 V, VIN = 0 V or 5 V | 3 | ||
| Negative Supply Current Room 25 °C (±15 V) | I- | -1 | -0.0001 | µA | 3 | ||
| Negative Supply Current Full (±15 V) | I- | -5 | µA | 3 | |||
| Logic Supply Current Room 25 °C (±15 V) | IL | 0.0001 | 1 | µA | 3 | ||
| Logic Supply Current Full (±15 V) | IL | 5 | µA | 3 | |||
| Ground Current Room 25 °C (±15 V) | IGND | -1 | -0.0001 | µA | 3 | ||
| Ground Current Full (±15 V) | IGND | -5 | µA | 3 | |||
| Analog Signal Range (unipolar 12 V) | VANALOG | 12 | V | V+ = 12 V, V- = 0 V, Full | 4 | ||
| Drain-Source On-Resistance RDS(on) Room 25 °C (unipolar 12 V) | RDS(on) | 40 | 80 | Ω | V+ = 10.8 V, IS = -10 mA, VD = 3 V, 8 V | 4 | |
| Drain-Source On-Resistance RDS(on) Full (unipolar 12 V) | RDS(on) | 100 | Ω | V+ = 10.8 V, IS = -10 mA, VD = 3 V, 8 V | 4 | ||
| Turn-On Time Room 25 °C (unipolar 12 V) | tON | 175 | 250 | ns | RL = 300, CL = 35 pF, VS = 8 V, see figure 2 | 4 | |
| Turn-On Time Hot (unipolar 12 V) | tON | 315 | ns | RL = 300, CL = 35 pF, VS = 8 V, see figure 2 | 4 | ||
| Turn-Off Time Room 25 °C (unipolar 12 V) | tOFF | 95 | 125 | ns | 4 | ||
| Turn-Off Time Hot (unipolar 12 V) | tOFF | 140 | ns | 4 | |||
| Positive Supply Current Room 25 °C (unipolar 12 V) | I+ | 0.0001 | 1 | µA | V+ = 13.5 V, VIN = 0 V or 5 V | 4 | |
| Positive Supply Current Hot (unipolar 12 V) | I+ | 5 | µA | V+ = 13.5 V, VIN = 0 V or 5 V | 4 | ||
| Negative Supply Current Room 25 °C (unipolar 12 V) | I- | -1 | -0.0001 | µA | 4 | ||
| Negative Supply Current Hot (unipolar 12 V) | I- | -5 | µA | 4 | |||
| Logic Supply Current Room 25 °C (unipolar 12 V) | IL | 0.0001 | 1 | µA | 4 | ||
| Logic Supply Current Hot (unipolar 12 V) | IL | 5 | µA | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Pc | 16-pin plastic DIPc 470 | 2 |
CAD (KiCad official)
- Symbol:
DG411DY-E3 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
dg411dy-e3-etched.step/dg411dy-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dg411dy-e3.step/dg411dy-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (14 pp, sha256
7d2688acee1bfd79, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).