component
RT9505GQW
Public Made by Adomby adom
Richtek Tech Battery Management, WDFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownRT9505GQW
Richtek Tech · Battery Management · WDFN-10-EP(3x3)
RT9505GQW from Richtek Tech, in a WDFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ACIN | power_in | Wall adaptor charge input supply; the ACIN input is rated -0.3V to 18V absolute maximum and recommended at 4.5V to 6V. |
| 2 | NC | unconnected | No internal connection. |
| 3 | CHG_S | output | Open-drain charge status indicator output that is ON (pulled low) during ACIN charge and OFF when charge is done. |
| 4 | PGOOD | output | Open-drain power good indicator output that the status table shows as ON during both ACIN charge and charge done. |
| 5 | GND | power_in | Ground. |
| 6 | ISETA | input | Wall adaptor charge current set point; a resistor from ISETA to GND (KSET = 300, VSET = 2.5V) sets the ACIN fast-charge current from 100mA to 1.2A. |
| 7 | NC | unconnected | No internal connection. |
| 8 | EN | input | Active-low charge enable input with logic-high threshold of at least 1.5V, logic-low maximum of 0.4V, and absolute maximum of 6V. |
| 9 | TS | input | Battery temperature sense input; charging is turned off when VTS is at or above 2.5V or at or below 0.5V, with a 96uA to 108uA source current. |
| 10 | BATT | power_out | Battery charge current output that regulates the battery voltage at VREG of 4.158V to 4.242V (4.2V nominal) at 60mA test current. |
| 11 | GND | power_in | Exposed pad must be soldered to the PCB and connected to GND for heat sinking and ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WDFN-10-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ACIN UVP Rising Threshold Voltage | VUV_HIGH | 4.4 | 4.5 | V | 5 | ||
| ACIN UVP Hysteresis | VUV_LOW | 50 | 80 | 120 | mV | 5 | |
| ACIN Standby Current | ISTBY | 300 | 500 | uA | VBATT = 4.5V | 5 | |
| ACIN Shutdown Current | ISHDN | 50 | 100 | uA | VEN = HIGH | 5 | |
| ACIN UVP Current | IUVP | 150 | 250 | uA | VACIN = 4V, VUSB = 4V, VBATT = 3V | 5 | |
| BATT Sleep Leakage Current | ISLEEP | 2 | 5 | uA | VACIN = 4V, VUSB = 4V, VBATT = 4.5V | 5 | |
| BATT Regulation Voltage | VREG | 4.158 | 4.2 | 4.242 | V | IBATT = 60mA | 5 |
| Regulation Voltage Accuracy | -1 | 1 | % | 5 | |||
| ACIN MOSFET RDS(ON) | RDS(ON)_ACIN | 600 | mΩ | IBATT = 500mA | 5 | ||
| ISETA Set Voltage (Fast Charge Phase) | VISETA | 2.45 | 2.5 | 2.55 | V | VBATT = 3.5V | 5 |
| Full Charge Setting Range | ICHG_AC | 100 | 1200 | mA | 5 | ||
| BATT Pre-Charge Rising Threshold | VPRECH | 2.6 | 2.8 | 3 | V | 6 | |
| BATT Pre-Charge Threshold Hysteresis | ΔVPRECH | 50 | 100 | 200 | mV | 6 | |
| Pre-Charge Current | IPCHG | 8 | 10 | 12 | % | VBATT = 2V | 6 |
| BATT Re-Charge Falling Threshold Hysteresis | ΔVRECH_L | 60 | 100 | 150 | mV | VREG − VBATT | 6 |
| ISETA Charge Termination Set Voltage | VTERM | 225 | 250 | 275 | mV | VBATT = 4.2V | 6 |
| Logic-High Voltage (EN Threshold) | VIH | 1.5 | V | 6 | |||
| Logic-Low Voltage (EN Threshold) | VIL | 0.4 | V | 6 | |||
| EN Pin Input Current | IEN | 2 | uA | VEN = 2V | 6 | ||
| TS Pin Source Current | ITS | 96 | 102 | 108 | uA | VTS = 1.5V | 6 |
| TS Pin Low Voltage Threshold | VTS_LOW | 0.485 | 0.5 | 0.515 | V | Falling | 6 |
| TS Pin High Voltage Threshold | VTS_HIGH | 2.45 | 2.5 | 2.55 | V | Rising | 6 |
| ACIN Input Voltage Range | 4.5 | 6 | V | 5 | |||
| Junction Temperature Range | TJ | -40 | 125 | °C | 5 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 5 | ||
| ACIN Input Voltage | -0.3 | 18 | V | 5 | |||
| EN Input Voltage | -0.3 | 6 | V | 5 | |||
| Output Current | 1.2 | A | 5 | ||||
| Power Dissipation (WDFN-10L 3x3) | PD | 0.926 | W | TA = 25°C | 5 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | Soldering, 10 sec | 5 | |||
| Junction Temperature | TJ | 150 | °C | 5 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 5 | ||
| ESD Susceptibility HBM | 2 | kV | Human Body Model (Note 3) | 5 | |||
| ESD Susceptibility MM | 200 | V | Machine Model (Note 3) | 5 | |||
| Package Thermal Resistance, Junction-to-Ambient (WDFN-10L 3x3) | θJA | 108 | °C/W | Note 2, JEDEC 51-7 4-layer board | 5 | ||
| Package Thermal Resistance, Junction-to-Case (WDFN-10L 3x3) | θJC | 8.2 | °C/W | Case point on exposed pad (Note 2) | 5 |
CAD (KiCad official)
- Symbol:
RT9505GQW - Footprint:
Package_DFN_QFN:WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mm - 3D model: WDFN-10-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
rt9505gqw-etched.step/rt9505gqw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9505gqw.step/rt9505gqw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (11 pp, sha256
650fd77c66339b8d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).