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AT24C256B-TH-T-TUDI
Public Made by Adomby adom
Tudi EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT24C256B-TH-T-TUDI
Tudi · EEPROM · TSSOP-8
AT24C256B-TH-T-TUDI from Tudi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hardwired to GND or Vcc, internally pulled down to GND if left floating, with up to eight 256K devices addressable on one bus. |
| 2 | A1 | input | Device address input hardwired to GND or Vcc, internally pulled down to GND if left floating, with up to eight 256K devices addressable on one bus. |
| 3 | A2 | input | Device address input hardwired to GND or Vcc, internally pulled down to GND if left floating, with up to eight 256K devices addressable on one bus. |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Bidirectional serial data pin, open-drain driven and may be wire-ORed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input that positive-edge clocks data into and negative-edge clocks data out of the EEPROM. |
| 7 | WP | input | Write protect input: GND allows normal writes, Vcc inhibits all write operations, and a floating pin is internally pulled down to GND. |
| 8 | VCC | power_in | Supply voltage, 1.8V to 5.5V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Clock frequency SCL (1.8-volt column) | fSCL | 400 | kHz | 1.8-volt column | 6 | ||
| Clock frequency SCL (2.5,5.0-volt column) | fSCL | 1000 | kHz | 2.5,5.0-volt column | 6 | ||
| Clock pulse width low (1.8-volt column) | tLOW | 1.3 | μs | 1.8-volt column | 6 | ||
| Clock pulse width low (2.5,5.0-volt column) | tLOW | 0.4 | μs | 2.5,5.0-volt column | 6 | ||
| Clock pulse width high (1.8-volt column) | tHIGH | 0.6 | μs | 1.8-volt column | 6 | ||
| Clock pulse width high (2.5,5.0-volt column) | tHIGH | 0.4 | μs | 2.5,5.0-volt column | 6 | ||
| Noise suppression time (1.8-volt column) | ti | 100 | ns | 1.8-volt column | 6 | ||
| Noise suppression time (2.5,5.0-volt column) | ti | 50 | ns | 2.5,5.0-volt column | 6 | ||
| Supply voltage | VCC1 | 1.8 | 5.5 | V | 6 | ||
| Supply current READ | ICC1 | 1 | 2 | mA | VCC=5.0V, READ at 400 kHz | 6 | |
| Supply current WRITE | ICC2 | 2 | 3 | mA | VCC=5.0V, WRITE at 400 kHz | 6 | |
| Standby current | ISB1 | 1 | μA | VCC=1.8V, VIN=VCC or VSS | 6 | ||
| Standby current | ISB1 | 6 | μA | VCC=5.5V, VIN=VCC or VSS | 6 | ||
| Input leakage current | ILI | 0.1 | 3 | μA | VIN=VCC or VSS, VCC=5.0V | 6 | |
| Output leakage current | ILO | 0.05 | 3 | μA | VOUT=VCC or VSS, VCC=5.0V | 6 | |
| Input low level | VIL | -0.6 | V | 6 | |||
| Output low level | VOL2 | 0.4 | V | VCC=3.0V, IOL=2.1 mA | 6 | ||
| Output low level | VOL1 | 0.2 | V | VCC=1.8V, IOL=0.15 mA | 6 | ||
| Clock low to data out valid (1.8-volt column) | tAA | 0.05 | 0.9 | μs | 1.8-volt column, CL = 100 pF | 7 | |
| Clock low to data out valid (2.5,5.0-volt column) | tAA | 0.05 | 0.55 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | |
| Bus free time before new transmission (1.8-volt column) | tBUF | 1.3 | μs | 1.8-volt column, CL = 100 pF | 7 | ||
| Bus free time before new transmission (2.5,5.0-volt column) | tBUF | 0.5 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Start hold time (1.8-volt column) | tHD.STA | 0.6 | μs | 1.8-volt column, CL = 100 pF | 7 | ||
| Start hold time (2.5,5.0-volt column) | tHD.STA | 0.25 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Start set-up time (1.8-volt column) | tSU.STA | 0.6 | μs | 1.8-volt column, CL = 100 pF | 7 | ||
| Start set-up time (2.5,5.0-volt column) | tSU.STA | 0.25 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Data in hold time (1.8-volt column) | tHD.DAT | 0 | μs | 1.8-volt column, CL = 100 pF | 7 | ||
| Data in hold time (2.5,5.0-volt column) | tHD.DAT | 0 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Data in set-up time (1.8-volt column) | tSU.DAT | 100 | ns | 1.8-volt column, CL = 100 pF | 7 | ||
| Data in set-up time (2.5,5.0-volt column) | tSU.DAT | 100 | ns | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Inputs rise time (1.8-volt column) | tR | 0.3 | μs | 1.8-volt column | 7 | ||
| Inputs rise time (2.5,5.0-volt column) | tR | 0.3 | μs | 2.5,5.0-volt column | 7 | ||
| Inputs fall time (1.8-volt column) | tF | 300 | ns | 1.8-volt column | 7 | ||
| Inputs fall time (2.5,5.0-volt column) | tF | 100 | ns | 2.5,5.0-volt column | 7 | ||
| Stop set-up time (1.8-volt column) | tSU.STO | 0.6 | μs | 1.8-volt column, CL = 100 pF | 7 | ||
| Stop set-up time (2.5,5.0-volt column) | tSU.STO | 0.25 | μs | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Data out hold time (1.8-volt column) | tDH | 50 | ns | 1.8-volt column, CL = 100 pF | 7 | ||
| Data out hold time (2.5,5.0-volt column) | tDH | 50 | ns | 2.5,5.0-volt column, CL = 100 pF | 7 | ||
| Write cycle time | tWR | 5 | ms | 7 | |||
| Endurance | 1e+06 | Write Cycles | 25℃, Page Mode, 3.3V | 7 | |||
| Input/output capacitance (SDA) | CI/O | 8 | pF | VI/O=0V, TA=25°C, f=1.0 MHz, VCC=+1.8V | 5 | ||
| Input capacitance (A0, A1, SCL) | CIN | 6 | pF | VIN=0V, TA=25°C, f=1.0 MHz, VCC=+1.8V | 5 | ||
| Operating temperature | -55 | 125 | °C | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Voltage on any pin with respect to ground | -1 | 7 | V | 3 | |||
| Maximum operating voltage | 6.25 | V | 3 | ||||
| DC output current | 5 | mA | 3 | ||||
| Supply voltage (recommended operating range) | VCC | 1.8 | 5.5 | V | 6 | ||
| Ambient temperature (recommended operating range, industrial) | TAI | -40 | 85 | °C | 6 |
CAD (KiCad official)
- Symbol:
AT24C256B-TH-T-TUDI - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
at24c256b-th-t-tudi-etched.step/at24c256b-th-t-tudi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24c256b-th-t-tudi.step/at24c256b-th-t-tudi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (18 pp, sha256
d618b66918fa7e6e, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).