component
EMB1412MY
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEMB1412MY
Texas Instruments · Pre-ordered Chips · HVSSOP-8
EMB1412MY from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN_REF | power_in | Ground reference for control inputs; connect to power ground (VEE) for positive-only output swing, or to system logic ground when VEE is connected to a negative gate drive supply. |
| 2 | INB | input | Inverting input pin with TTL compatible thresholds; connect to IN_REF when not used. |
| 3 | VEE | power_in | Power ground for driver outputs; connect to either power ground or a negative gate drive supply for positive or negative voltage swing. |
| 4 | IN | input | Non-inverting input pin with TTL compatible thresholds; pull up to VCC when not used. |
| 5 | N/C | unconnected | Not internally connected. |
| 6 | VCC | power_in | Positive supply voltage input (operating range 3.5 V to 14 V); locally decouple to VEE with the capacitor located close to the chip. |
| 7 | OUT | output | Gate drive output capable of sourcing 3 A and sinking 7 A, with voltage swing from VEE to VCC. |
| 8 | N/C | unconnected | Not internally connected. |
| 9 | EP | passive | Exposed pad on underside of package, internally bonded to the die substrate; connect to VEE ground pin for low thermal impedance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-8 |
| Category | Interface ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC to VEE | -0.3 | 15 | V | 4 | |||
| VCC to IN_REF | -0.3 | 15 | V | 4 | |||
| IN/INB to IN_REF | -0.3 | 15 | V | 4 | |||
| IN_REF to VEE | -0.3 | 5 | V | 4 | |||
| Maximum junction temperature | 150 | °C | 4 | ||||
| Storage temperature range | Tstg | -55 | 150 | °C | 4 | ||
| Electrostatic discharge HBM | V(ESD) | 2 | kV | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins | 4 | ||
| Operating Junction Temperature | -40 | 125 | °C | 4 | |||
| VCC Operating Range | VCC | 3.5 | 14 | V | VCC, IN_REF and VCC - VEE | 4 | |
| VCC Under-voltage Lockout (rising) | UVLO | 2.4 | 3 | 3.5 | V | VCC, IN_REF | 4 |
| VCC Under-voltage Hysteresis | VCCH | 230 | mV | 4 | |||
| VCC Supply Current | ICC | 1 | 2 | mA | 4 | ||
| Logic High | VIH | 2.3 | V | 4 | |||
| Logic Low | VIL | 0.8 | V | 4 | |||
| High Threshold | VthH | 1.3 | 1.75 | 2.3 | V | 4 | |
| Low Threshold | VthL | 0.8 | 1.35 | 2 | V | 4 | |
| Input Hysteresis | HYS | 400 | mV | 4 | |||
| Input Current Low | IIL | -1 | 0.1 | 1 | µA | IN = INB = 0 V | 5 |
| Input Current High | IIH | -1 | 0.1 | 1 | µA | IN = INB = VCC | 5 |
| Output Resistance High | ROH | 30 | 50 | Ω | IOUT = -10 mA | 5 | |
| Output Resistance Low | ROL | 1.4 | 2.5 | Ω | IOUT = 10 mA | 5 | |
| Peak Source Current | ISOURCE | 3 | A | OUT = VCC/2, 200 ns pulsed current | 5 | ||
| Peak Sink Current | ISINK | 7 | A | OUT = VCC/2, 200 ns pulsed current | 5 | ||
| Propagation Delay Time Low to High | td1 | 25 | 40 | ns | CLOAD = 2 nF, IN/INB rising (IN to OUT) | 5 | |
| Propagation Delay Time High to Low | td2 | 25 | 40 | ns | CLOAD = 2 nF, IN / INB falling (IN to OUT) | 5 | |
| Rise time | tr | 14 | ns | CLOAD = 2 nF | 5 | ||
| Fall time | tf | 12 | ns | CLOAD = 2 nF | 5 | ||
| Latchup protection | 500 | mA | AEC -Q100, METHOD 004 TJ = 150°C | 5 | |||
| Junction-to-ambient thermal resistance | RθJA | 60 | °C/W | VSSOP (DGN) 8 pins; 0 LFPM Air Flow | 4 | ||
| Junction-to-case (bottom) thermal resistance | RθJCbot | 4.7 | °C/W | VSSOP (DGN) 8 pins | 4 |
CAD (KiCad official)
- Symbol:
EMB1412MY - Footprint:
Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm - 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
emb1412my-etched.step/emb1412my-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);emb1412my.step/emb1412my.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
4d5366fbf5919b3f, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).