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SN74CBTLV3251PWR
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Texas Instruments Logic ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74CBTLV3251PWR
Texas Instruments · Logic ICs · TSSOP-16
SN74CBTLV3251PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B4 | bidirectional | Switch I/O channel 4 of the 1-of-8 mux, connected to the A port when OE is low, S2 is low, S1 is high and S0 is high (Table 7-1). |
| 2 | B3 | bidirectional | Switch I/O channel 3 of the 1-of-8 mux, connected to the A port when OE is low, S2 is low, S1 is high and S0 is low (Table 7-1). |
| 3 | B2 | bidirectional | Switch I/O channel 2 of the 1-of-8 mux, connected to the A port when OE is low, S2 is low, S1 is low and S0 is high (Table 7-1). |
| 4 | B1 | bidirectional | Switch I/O channel 1 of the 1-of-8 mux, connected to the A port when OE is low, S2 is low, S1 is low and S0 is low (Table 7-1). |
| 5 | A | bidirectional | Common mux port that connects to the selected B channel when OE is low; the datasheet lists it as Output/Input of mux (Table 4-1). |
| 6 | NC | unconnected | No internal connection. |
| 7 | OE | input | Active-low output enable: when high, the FET multiplexer/demultiplexer is disabled, and OE must be tied to VCC through a pullup resistor to ensure high-impedance during power up or power down (Section 7.1). |
| 8 | GND | power_in | Ground reference. |
| 9 | S2 | input | Select input bit 2 for channel selection; at VCC 2.7 V to 3.6 V the high-level input is at least 2 V and the low-level input is at most 0.8 V (Section 5.3). |
| 10 | S1 | input | Select input bit 1 for channel selection; at VCC 2.7 V to 3.6 V the high-level input is at least 2 V and the low-level input is at most 0.8 V (Section 5.3). |
| 11 | S0 | input | Select input bit 0 for channel selection; at VCC 2.7 V to 3.6 V the high-level input is at least 2 V and the low-level input is at most 0.8 V (Section 5.3). |
| 12 | B8 | bidirectional | Switch I/O channel 8 of the 1-of-8 mux, connected to the A port when OE is low, S2 is high, S1 is high and S0 is high (Table 7-1). |
| 13 | B7 | bidirectional | Switch I/O channel 7 of the 1-of-8 mux, connected to the A port when OE is low, S2 is high, S1 is high and S0 is low (Table 7-1). |
| 14 | B6 | bidirectional | Switch I/O channel 6 of the 1-of-8 mux, connected to the A port when OE is low, S2 is high, S1 is low and S0 is high (Table 7-1). |
| 15 | B5 | bidirectional | Switch I/O channel 5 of the 1-of-8 mux, connected to the A port when OE is low, S2 is high, S1 is low and S0 is low (Table 7-1). |
| 16 | VCC | power_in | Supply voltage, recommended range 2.3 V to 3.6 V (absolute maximum 4.6 V); place a bypass capacitor as close to the pin as possible (Sections 5.1, 5.3, 8.2). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VCC) recommended operating range | VCC | 2.3 | 3.6 | V | 4 | ||
| High-level control input voltage | VIH | 1.7 | V | VCC = 2.3V to 2.7V | 4 | ||
| High-level control input voltage | VIH | 2 | V | VCC = 2.7V to 3.6V | 4 | ||
| Low-level control input voltage | VIL | 0.7 | V | VCC = 2.3V to 2.7V | 4 | ||
| Low-level control input voltage | VIL | 0.8 | V | VCC = 2.7V to 3.6V | 4 | ||
| Operating free-air temperature (PKG = PW) | TA | -40 | 85 | °C | 4 | ||
| Supply voltage | VCC | -0.5 | 4.6 | V | 4 | ||
| Input voltage | VI | -0.5 | 4.6 | V | 4 | ||
| Continuous channel current | 128 | mA | 4 | ||||
| Input clamp current | IIK | -50 | mA | VI/O < 0 | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Input clamp voltage | VIK | -1.2 | V | VCC = 3V, II = -18mA | 5 | ||
| Input leakage current | II | -1 | 1 | µA | VCC = 3.6V, VI = VCC or GND | 5 | |
| Partial power-down leakage current | Ioff | 20 | µA | VCC = 0, VI or VO = 0 to 3.6V | 5 | ||
| Quiescent supply current | ICC | 10 | µA | VCC = 3.6V, IO = 0, VI = VCC or GND | 5 | ||
| Increase in supply current per control input | ΔICC | 300 | µA | VCC = 3.6V, one input at 3V, other inputs at VCC or GND (control inputs) | 5 | ||
| On-state resistance | ron | 5 | 8 | Ω | VCC = 2.3V, VI = 0, II = 64mA | 5 | |
| On-state resistance | ron | 27 | 40 | Ω | VCC = 2.3V, VI = 1.7V, II = 15mA | 5 | |
| On-state resistance | ron | 5 | 7 | Ω | VCC = 3V, VI = 0, II = 64mA | 5 | |
| On-state resistance | ron | 10 | 15 | Ω | VCC = 3V, VI = 2.4V, II = 15mA | 5 | |
| Switch enable time, S to A | ten | 1 | 6.1 | ns | VCC = 2.5 ± 0.2V | 5 | |
| Switch enable time, S to A | ten | 1 | 5.3 | ns | VCC = 3.3V ± 0.3V | 5 | |
| Switch enable time, S to B | ten | 1 | 4.1 | ns | VCC = 2.5 ± 0.2V | 5 | |
| Switch enable time, S to B | ten | 1 | 3.6 | ns | VCC = 3.3V ± 0.3V | 5 | |
| Switch disable time, S to B | tdis | 1 | 3.5 | ns | VCC = 2.5 ± 0.2V | 5 | |
| Switch disable time, S to B | tdis | 1 | 3.3 | ns | VCC = 3.3V ± 0.3V | 5 | |
| Enable time, OE to A or B | ten | 1 | 5.2 | ns | VCC = 2.5 ± 0.2V | 5 | |
| Enable time, OE to A or B | ten | 1 | 4.5 | ns | VCC = 3.3V ± 0.3V | 5 | |
| Disable time, OE to A or B | tdis | 1 | 6.7 | ns | VCC = 2.5 ± 0.2V | 5 | |
| Disable time, OE to A or B | tdis | 1 | 7.2 | ns | VCC = 3.3V ± 0.3V | 5 | |
| Junction-to-ambient thermal resistance (PW package) | RθJA | 129.1 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
SN74CBTLV3251PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74cbtlv3251pwr-etched.step/sn74cbtlv3251pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cbtlv3251pwr.step/sn74cbtlv3251pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
181d38df0e944a2b, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).