TPA3136AD2PWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SD	input	Shutdown logic input for the audio amplifier, LOW puts the outputs in Hi-Z and HIGH enables them, with TTL logic levels referenced to AVCC.
2	FAULT	output	Open-drain output that reports short-circuit or DC-detect fault status and is voltage compliant to AVCC; tie it to SD for automatic short-circuit recovery.
3	LINP	input	Positive audio input for the left channel, biased at 3 V.
4	LINN	input	Negative audio input for the left channel, biased at 3 V.
5	NC	unconnected	No-connect pin that can be shorted to PVCC, shorted to GND, or left open.
6	NC	unconnected	No-connect pin that can be shorted to PVCC, shorted to GND, or left open.
7	AVCC	power_in	Analog supply; the recommended supply range for TPA3136AD2 is 8 V to 14.4 V.
8	GND	power_in	Analog signal ground.
9	GVDD	output	High-side FET gate drive supply with a nominal voltage of 7 V, which requires a 1-µF capacitor to ground.
10	PLIMIT	input	Power limiter control pin whose voltage sets the PLIMIT threshold.
11	RINN	input	Negative audio input for the right channel, biased at 3 V.
12	RINP	input	Positive audio input for the right channel, biased at 3 V.
13	NC	unconnected	No-connect pin that can be shorted to PVCC, shorted to GND, or left open.
14	PBTL	input	Parallel BTL mode select pin: L selects stereo BTL mode and H selects mono PBTL mode.
15	PVCC	power_in	Power supply for the right-channel H-bridge, connected internally to the left-channel supply input.
16	PVCC	power_in	Power supply for the right-channel H-bridge, connected internally to the left-channel supply input.
17	BSPR	input	Bootstrap I/O for the right channel positive high-side FET.
18	OUTPR	output	Class-D H-bridge positive output for the right channel.
19	GND	power_in	Power ground for the H-bridges.
20	OUTNR	output	Class-D H-bridge negative output for the right channel.
21	BSNR	input	Bootstrap I/O for the right channel negative high-side FET.
22	BSNL	input	Bootstrap I/O for the left channel negative high-side FET.
23	OUTNL	output	Class-D H-bridge negative output for the left channel.
24	GND	power_in	Power ground for the H-bridges.
25	OUTPL	output	Class-D H-bridge positive output for the left channel.
26	BSPL	input	Bootstrap I/O for the left channel positive high-side FET.
27	PVCC	power_in	Power supply for the left-channel H-bridge, connected internally to the right-channel supply input.
28	PVCC	power_in	Power supply for the left-channel H-bridge, connected internally to the right-channel supply input.
29	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	HTSSOP-28-EP
Category	Operational Amplifier/Comparator
Pins	29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage AVCC to GND, PVCC to GND		-0.3		20	V		6
Input current to any pin except supply pins				10	mA		6
Voltage SD, FAULT to GND		-0.3			V	max AVCC + 0.3 V	6
Voltage RINN, RINP, LINN, LINP		-0.3		6.3	V		6
Minimum load resistance RL, BTL	RL	4.8			Ω	BTL, PVCC > 12 V	6
Minimum load resistance RL, BTL	RL	3.2			Ω	BTL, PVCC ≤ 12 V	6
Minimum load resistance RL, PBTL	RL	2.5			Ω	PBTL, PVCC > 12 V	6
Minimum load resistance RL, PBTL	RL	1.8			Ω	PBTL, PVCC ≤ 12 V	6
Operating free-air temperature range	TA	-40		85	°C		6
Storage temperature range	Tstg	-65		150	°C		6
Supply voltage PVCC, AVCC (TPA3136A)	VCC	8		14.4	V	PVCC, AVCC TPA3136A	6
High-level input voltage SD, PBTL	VIH	2			V	SD, PBTL	6
Low-level input voltage SD, PBTL	VIL			0.8	V	SD, PBTL	6
Low-level output voltage FAULT	VOL			0.8	V	FAULT, RPULL-UP=100 kΩ, PVCC=14.4 V	6
High-level input current SD, PBTL	IIH			50	µA	SD, PBTL, VI = 2 V, AVCC = 12 V	6
Low-level input current SD, PBTL	IIL			5	µA	SD, PBTL, VI = 0.8 V, AVCC = 12 V	6
Operating free-air temperature	TA	-40		85	°C		6
Operating junction temperature	TJ	-40		150	°C		6
Class-D output offset voltage (differential)	/VOS/		1.5	15	mV	VI = 0 V, Gain = 26 dB	7
Quiescent supply current	ICC		35	40	mA	SD = 2 V, no load, 300 ohm Ferrite Bead + 1nF Output Filter	7
Quiescent supply current in shutdown mode	ICC(SD)		40	60	µA	SD = 0.8 V, no load	7
Drain-source on-state resistance, high side	rDS(on)			240	mΩ	IO = 500 mA, TJ = 25°C, excluding metal and bond wire resistance	7
Drain-source on-state resistance, low side	rDS(on)			240	mΩ	IO = 500 mA, TJ = 25°C, excluding metal and bond wire resistance	7
Gain	G	25	26	27	dB		7
Gate drive supply	GVDD	6.4	6.9	7.4	V	IGVDD = 2 mA	7
Oscillator frequency, spread spectrum ON	fOSC, SS	255	315	355	kHz	Spread spectrum ON	7
Turn-on time	ton		14		ms	SD = 2 V	7
Turn-off time	tOFF		2.5		µs	SD = 0.8 V	7
Thermal trip point	OTE		150		°C		7
Thermal hysteresis			15		°C		7
Junction-to-ambient thermal resistance	RθJA		30.3		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7
Junction-to-case (top) thermal resistance	RθJC(top)		33.5		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7
Junction-to-board thermal resistance	RθJB		17.5		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7
Junction-to-top characterization parameter	ψJT		0.9		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7
Junction-to-board characterization parameter	ψJB		7.2		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7
Junction-to-case (bottom) thermal resistance	RθJC(bot)		0.9		°C/W	PWP (HTSSOP) 28 pins, TPA3136D2 EVM (SLOU444)	7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	copper		noise on the power supply leads. For higher frequency transients due to parasitic circuit elements such as bond wire and copper trace inductances as well as lead frame capacitance, a good quality low	24

CAD (KiCad official)

Symbol: TPA3136AD2PWPR
Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
3D model files: tpa3136ad2pwpr-etched.step / tpa3136ad2pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpa3136ad2pwpr.step / tpa3136ad2pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (35 pp, sha256 cd45a0760d0687c4, retrieved 2026-11-02, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

TPA3136AD2PWPR

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3D Model

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