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HC32L130J8TA-LQ48

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by Ray

XHSC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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HC32L130J8TA-LQ48

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

HC32L130J8TA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCAP power_out Internal LDO core-supply output. Connect a >=1 uF decoupling capacitor to DVSS; do not use to power external circuitry.
2 PC13 bidirectional General-purpose IO. Alt: RTC_1HZ, TIM3_CH1B (digital); LVD_IN0 (analog LVD input).
3 PC14/XTLI bidirectional GPIO PC14, dual-function as XTL 32.768 kHz low-speed crystal oscillator input.
4 PC15/XTLO bidirectional GPIO PC15, dual-function as XTL 32.768 kHz low-speed crystal oscillator output.
5 PD00/XTHI bidirectional GPIO PD00. Alt: I2C0_SDA, UART1_TXD; dual-function as XTH high-speed 4-32 MHz crystal oscillator input.
6 PD01/XTHO bidirectional GPIO PD01. Alt: I2C0_SCL, TIM4_CHB, UART1_RXD; dual-function as XTH high-speed crystal oscillator output.
7 RESETB input Active-low chip reset input. Internal pull-up; drive low to reset the MCU.
8 AVSS power_in Analog ground reference for ADC/VC/OPA/LVD.
9 AVCC power_in Analog supply for ADC/VC/OPA/LVD. Operating range 1.8-5.5 V; decouple to AVSS.
10 PA00 bidirectional General-purpose IO with rich mux: UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA (digital); AIN0, VC0_INP4/INN0, VC1_INP0/INN4 (analog).
11 PA01 bidirectional GPIO with mux: UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI (digital); AIN1, VC0_INP5/INN1, VC1_INP1/INN5 (analog).
12 PA02 bidirectional GPIO with mux: SPI1_MOSI, UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO (digital); AIN2, VC0_INP6/INN2, VC1_INP2 (analog).
13 PA03 bidirectional GPIO with mux: SPI1_MISO, UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA (digital); AIN3, VC0_INP7/INN3, VC1_INP3 (analog).
14 PA04 bidirectional GPIO with mux: SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B (digital); AIN4, VC0_INP8/INN4, VC1_INP4 (analog).
15 PA05 bidirectional GPIO with mux: SPI0_CLK/SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT, XTH_OUT (digital); AIN5, VC0_INP9/INN5, VC1_INP5 (analog).
16 PA06 bidirectional GPIO with mux: SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE, LPUART0_CTS (digital); AIN6, VC0_INP10/INN6 (analog).
17 PA07 bidirectional GPIO with mux: SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB, LPUART0_TXD (digital); AIN7, VC0_INP11/INN7 (analog).
18 PB00 bidirectional GPIO with mux: PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT (digital); AIN8, VC0_INN10, VC1_INN6 (analog).
19 PB01 bidirectional GPIO with mux: PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS (digital); AIN9/EXVREF (external ADC reference), VC1_INP6/INN7 (analog).
20 PB02 bidirectional GPIO with mux: LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK (digital); AIN16, VC1_INP7/INN8, OP2_INN (analog).
21 PB10 bidirectional GPIO with mux: I2C1_SCL, SPI1_CLK/SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS, UART1_RTS (digital); AIN17, VC1_INP8, OP2_INP (analog).
22 PB11 bidirectional GPIO with mux: I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS, UART1_CTS (digital); AIN18, OP2_OUT (analog).
23 DVSS power_in Digital ground reference. Bond to a solid ground plane along with pin 47.
24 DVCC power_in Digital supply, 1.8-5.5 V. Decouple to DVSS; both DVCC pins (24 and 48) must be tied to the same rail.
25 PB12 bidirectional GPIO with mux: SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS, TIM6_CHA (digital); AIN19, VC1_INP9, OP1_INN (analog).
26 PB13 bidirectional GPIO with mux: SPI1_CLK/SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE, TIM6_CHB (digital); AIN20, VC1_INP10, OP1_INP (analog).
27 PB14 bidirectional GPIO with mux: SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS, TIM1_BK (digital); AIN21, VC1_INP11, OP1_OUT (analog).
28 PB15 bidirectional GPIO with mux: SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE, LPUART1_RXD (digital); AIN22, OP0_INN (analog).
29 PA08 bidirectional GPIO with mux: UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK (digital).
30 PA09 bidirectional GPIO with mux: UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA (digital).
31 PA10 bidirectional GPIO with mux: UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA (digital).
32 PA11 bidirectional GPIO with mux: UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB (digital).
33 PA12 bidirectional GPIO with mux: UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI, PCNT_S0, IR_OUT (digital).
34 PA13/SWDIO bidirectional Serial-wire debug data (SWDIO) by default; alt: UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1, IR_OUT.
35 PD06 bidirectional GPIO with mux: I2C1_SCL, LPUART1_CTS, UART0_CTS (digital).
36 PD07 bidirectional GPIO with mux: I2C1_SDA, LPUART1_RTS, UART0_RTS (digital).
37 PA14/SWCLK bidirectional Serial-wire debug clock (SWCLK) by default; alt: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT.
38 PA15 bidirectional GPIO with mux: SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA, TIM3_CH1A (digital).
39 PB03 bidirectional GPIO with mux: SPI0_CLK/SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM_GATE, XTL_OUT, XTH_OUT (digital); VC1_INN9 (analog).
40 PB04 bidirectional GPIO with mux: SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B, LPTIM_ETR (digital); VC0_INP12, VC1_INP12/INN10 (analog).
41 PB05 bidirectional GPIO with mux: SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM_GATE, PCNT_S0, UART0_RTS (digital); VC0_INP13, VC1_INP13 (analog).
42 PB06 bidirectional GPIO with mux: I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM_ETR, TIM3_CH0A, LPTIM_TOG (digital); VC0_INP14, VC1_INP14 (analog).
43 PB07 bidirectional GPIO with mux: I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM_TOGN, PCNT_S1 (digital); VC0_INP15, VC1_INP15, LVD_IN2 (analog).
44 PD03/BOOT0 input Boot mode select: high at reset enters ISP Flash-programming mode; low at reset runs user Flash. Sampled only at reset; usable as PD03 GPIO afterwards.
45 PB08 bidirectional GPIO with mux: I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD (digital); LVD_IN1 (analog).
46 PB09 bidirectional GPIO with mux: I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB, UART0_RXD (digital).
47 DVSS power_in Digital ground (second DVSS pin). Tie to main ground plane along with pin 23.
48 DVCC power_in Digital supply (second DVCC pin), 1.8-5.5 V. Decouple to DVSS; tied to same rail as pin 24.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

Same part, different packaging or reel option.

  • HC32L130J8TA-LQ48
  • HC32L136J8TA
  • HC32L130J8TA-LQ48J8UA
  • HC32L130J8UA
  • HC32L130J8TA-LQ48K8TA
  • HC32L136K8TA
  • HC32L130J8TA-LQ48F8UA
  • HC32L130F8UA
  • HC32L130J8TA-LQ48E8PA
  • HC32L130E8PA

CAD (KiCad official)

  • Symbol: HC32L130J8TA-LQ48
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (90 pp, sha256 863554b2ffdb4447, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF