DMP3130LQ-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G	input	Gate terminal; gate-source voltage is limited to ±12 V and the gate threshold voltage is -0.6 V to -1.3 V at ID = -250 µA.
2	S	passive	Source terminal of the P-channel MOSFET; drain-source voltage is rated -30 V and continuous body diode forward current is -1.6 A.
3	D	passive	Drain terminal; drain-source voltage is rated -30 V with continuous drain current of -3.5 A at TA = +25°C (VGS = -4.5 V, steady state) and pulsed drain current of -20 A.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SOT-23
Category	Transistors
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDSS			-30	V		2
Gate-Source Voltage	VGSS	-12		12	V		2
Continuous Drain Current, steady state	ID			-3.5	A	Steady state, TA=+25°C, VGS=-4.5V (Note 6)	2
Continuous Drain Current, steady state	ID			-2.6	A	Steady state, TA=+70°C, VGS=-4.5V (Note 6)	2
Continuous Drain Current, t<10s	ID			-4.1	A	t<10s, TA=+25°C, VGS=-4.5V (Note 6)	2
Continuous Drain Current, t<10s	ID			-3.2	A	t<10s, TA=+70°C, VGS=-4.5V (Note 6)	2
Maximum Continuous Body Diode Forward Current	IS			-1.6	A	Note 6	2
Pulsed Drain Current	IDM			-20	A	10μs pulse, duty cycle = 1%	2
Total Power Dissipation	PD			0.7	W	TA=+25°C, Note 6	2
Total Power Dissipation	PD			0.4	W	TA=+70°C, Note 6	2
Total Power Dissipation	PD			1.3	W	TA=+25°C, Note 7	2
Total Power Dissipation	PD			0.8	W	TA=+70°C, Note 7	2
Thermal Resistance, Junction to Ambient, steady state	RθJA			184	°C/W	Steady state, Note 6	2
Thermal Resistance, Junction to Ambient, t<10s	RθJA			115	°C/W	t<10s, Note 6	2
Thermal Resistance, Junction to Ambient, steady state	RθJA			94	°C/W	Steady state, Note 7	2
Thermal Resistance, Junction to Ambient, t<10s	RθJA			61	°C/W	t<10s, Note 7	2
Thermal Resistance, Junction to Case	RθJC			25	°C/W		2
Thermal Resistance, Junction to Ambient (transient reference)	RθJA			176	°C/W	Fig. 12 transient thermal resistance reference value	5
Operating and Storage Temperature Range	TJ, TSTG	-55		150	°C		2
Drain-Source Breakdown Voltage	BVDSS	-30			V	VGS = 0V, ID = -250μA	2
Zero Gate Voltage Drain Current	IDSS			-1	μA	VDS = -30V, VGS = 0V	2
Gate-Body Leakage	IGSS	-100		100	nA	VGS = ±12V, VDS = 0V	2
Gate Threshold Voltage	VGS(TH)	-1.3		-0.6	V	VDS = VGS, ID = -250μA	2
Static Drain-Source On-Resistance	RDS(ON)		59	77	mΩ	VGS = -10V, ID = -4.2A	2
Static Drain-Source On-Resistance	RDS(ON)		73	95	mΩ	VGS = -4.5V, ID = -4A	2
Static Drain-Source On-Resistance	RDS(ON)		115	150	mΩ	VGS = -2.5V, ID = -3A	2
Source-Drain Diode Forward Voltage	VSD		-0.8	-1.25	V	VGS = 0V, IS = -3.0A	2
Input Capacitance	Ciss		432	864	pF	VDS = -15V, VGS = 0V, f = 1.0MHz	2
Output Capacitance	Coss		87	174	pF	VDS = -15V, VGS = 0V, f = 1.0MHz	2
Reverse Transfer Capacitance	Crss		62	124	pF	VDS = -15V, VGS = 0V, f = 1.0MHz	2
Total Gate Charge	QG		5.9	11.8	nC	VDS = -15V, VGS = -4.5V, ID = -4.0A	2
Total Gate Charge	QG		12	24	nC	VDS = -15V, VGS = -10V, ID = -4.0A	2
Gate-Source Charge	QGS		1	2	nC	VDS = -15V, VGS = -4.5V, ID = -4.0A	2
Gate-Drain Charge	QGD		3.1	6.2	nC	VDS = -15V, VGS = -4.5V, ID = -4.0A	2
Turn-On Delay Time	tD(ON)		4.6	9.2	ns	VDS = -15V, VGS = -10V, ID = -1A, RG = 6.0Ω	2
Rise Time	tR		6.5	13	ns	VDS = -15V, VGS = -10V, ID = -1A, RG = 6.0Ω	2
Turn-Off Delay Time	tD(OFF)		27.8	55.6	ns	VDS = -15V, VGS = -10V, ID = -1A, RG = 6.0Ω	2
Fall Time	tF		15	30	ns	VDS = -15V, VGS = -10V, ID = -1A, RG = 6.0Ω	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	Copper	tin	 Terminals: Finish, Matte Tin Annealed over Copper	1

CAD (KiCad official)

Symbol: DMP3130LQ-7
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.025 mm tall, datasheet A, nominal). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
3D model files: dmp3130lq-7-etched.step / dmp3130lq-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3130lq-7.step / dmp3130lq-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (6 pp, sha256 660ad8d2ce12ce40, retrieved 2026-11-12, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

DMP3130LQ-7

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3D Model

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