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CD4048BM
Public Made by Adomby adom
Texas Instruments Logic Gates, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4048BM
Texas Instruments · Logic Gates · SOP-16
CD4048BM from Texas Instruments, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | J (OUTPUT) | tri_state | Three-state output that gives the selected logic function and goes open-circuit (high impedance) when Kd is low. |
| 2 | Kd | input | Three-state control input: high gives normal inverter action at the output, low makes the output open-circuit (high impedance), with input range -0.5 V to VDD+0.5 V. |
| 3 | H | input | Logic input H, with input voltage range -0.5 V to VDD+0.5 V. |
| 4 | G | input | Logic input G, with input voltage range -0.5 V to VDD+0.5 V. |
| 5 | F | input | Logic input F, with input voltage range -0.5 V to VDD+0.5 V. |
| 6 | E | input | Logic input E, with input voltage range -0.5 V to VDD+0.5 V. |
| 7 | Kb | input | Binary control input (with Ka and Kc) that selects one of eight logic functions, with input range -0.5 V to VDD+0.5 V. |
| 8 | VSS | power_in | Negative supply / ground reference, with all voltage ratings referenced to it. |
| 9 | Kc | input | Binary control input (with Ka and Kb) that selects one of eight logic functions, with input range -0.5 V to VDD+0.5 V. |
| 10 | Ka | input | Binary control input (with Kb and Kc) that selects one of eight logic functions, with input range -0.5 V to VDD+0.5 V. |
| 11 | D | input | Logic input D, with input voltage range -0.5 V to VDD+0.5 V. |
| 12 | C | input | Logic input C, with input voltage range -0.5 V to VDD+0.5 V. |
| 13 | B | input | Logic input B, with input voltage range -0.5 V to VDD+0.5 V. |
| 14 | A | input | Logic input A, with input voltage range -0.5 V to VDD+0.5 V. |
| 15 | EXPAND | input | Expand input that increases the number of gate inputs by cascading CD4048Bs, and is connected to VSS when not used. |
| 16 | VDD | power_in | Positive supply, recommended 3 V to 18 V, with an absolute maximum of -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4048BM - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4048bm-etched.step/cd4048bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4048bm.step/cd4048bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
dab91602c2ea2214, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).