component
HCPL-0900-500E
Public Made by Adomby adom
Broadcom Limited Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHCPL-0900-500E
Broadcom Limited · Digital Isolators · SOIC-8
HCPL-0900-500E from Broadcom Limited, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Input-side power supply 1, recommended 3.0 V to 5.5 V (absolute maximum 7 V), decoupled with a 47 nF low-ESR ceramic capacitor placed close to the pin. |
| 2 | IN1 | input | Logic input signal, with logic high of 2.4 V min up to VDD1, logic low of 0 V to 0.8 V, and input current of ±10 µA max. |
| 3 | NC | unconnected | Not connected. |
| 4 | GND1 | power_in | Ground for the input-side supply VDD1 (Power Supply Ground 1); a ground plane is recommended for data rates above 10 Mb/s. |
| 5 | GND2 | power_in | Ground for the output-side supply VDD2 (Power Supply Ground 2); a ground plane is recommended for data rates above 10 Mb/s. |
| 6 | OUT1 | tri_state | Logic output signal that follows IN1 when VOE is low and goes to high impedance when VOE is high, with an absolute maximum of 10 mA output current drive. |
| 7 | VOE | input | Active-low logic output enable for the single-channel device, where low enables OUT1 and high puts it in high impedance, with an absolute maximum of VDD2 + 0.5 V. |
| 8 | VDD2 | power_in | Output-side power supply 2, recommended 3.0 V to 5.5 V (absolute maximum 7 V), decoupled with a 47 nF low-ESR ceramic capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom Limited |
| Package | SOIC-8 |
| Category | Signal Isolation Devices |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
HCPL-0900-500E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
hcpl-0900-500e-etched.step/hcpl-0900-500e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcpl-0900-500e.step/hcpl-0900-500e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom Limited datasheet (18 pp, sha256
165f65248fb845d7, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).