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74AUP2G86DC

Nexperia · Gates · VSSOP-8-0.5mm

74AUP2G86DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input A of gate 1. Schmitt-trigger logic input; accepts voltages up to 3.6 V regardless of VCC.
2 1B input Data input B of gate 1. Schmitt-trigger logic input; accepts voltages up to 3.6 V regardless of VCC.
3 2Y output Data output of gate 2 (XOR of 2A and 2B). Push-pull CMOS output; drive capability spec'd from ±20 μA up to ±4.0 mA depending on VCC.
4 GND power_in Ground reference (0 V).
5 2A input Data input A of gate 2. Schmitt-trigger logic input; accepts voltages up to 3.6 V regardless of VCC.
6 2B input Data input B of gate 2. Schmitt-trigger logic input; accepts voltages up to 3.6 V regardless of VCC.
7 1Y output Data output of gate 1 (XOR of 1A and 1B). Push-pull CMOS output; drive capability spec'd from ±20 μA up to ±4.0 mA depending on VCC.
8 VCC power_in Supply voltage input. Operating range 0.8 V to 3.6 V (absolute max +4.6 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package VSSOP-8-0.5mm
Category Logic
Pins 8

Ordering variants

  • 74AUP2G86DC
  • 74AUP2G86DCGT
  • 74AUP2G86DCGN
  • 74AUP2G86DCGS

CAD (KiCad official)

  • Symbol: 74AUP2G86DC
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (17 pp, sha256 50d291d482dfdad7, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF