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Contents

README

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STM32F100RCT6BTR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F100RCT6BTR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in
2 PC13-TAMPER-RTC bidirectional
3 PC14-OSC32_IN bidirectional
4 PC15-OSC32_OUT bidirectional
5 PD0-OSC_IN bidirectional High-speed external clock input (4-24 MHz); remappable to PD0.
6 PD1-OSC_OUT bidirectional High-speed external clock output; remappable to PD1.
7 NRST input System reset pin with Schmitt trigger input, internal 40 kΩ pull-up, and filtering.
8 PC0 bidirectional GPIO PC0; supports ADC_IN10 analog input alternate function.
9 PC1 bidirectional GPIO PC1; supports ADC_IN11 analog input alternate function.
10 PC2 bidirectional GPIO PC2; supports ADC_IN12 analog input alternate function.
11 PC3 bidirectional GPIO PC3; supports ADC_IN13 analog input alternate function.
12 VSSA power_in Analog ground supply reference.
13 VDDA power_in Analog power supply, 2.4 to 3.6 V.
14 PA0-WKUP bidirectional GPIO PA0-WKUP with wakeup capability; supports USART2_CTS, ADC_IN0, TIM2_CH1_ETR, TIM5_CH1 alternate functions.
15 PA1 bidirectional GPIO PA1; supports USART2_RTS, ADC_IN1, TIM2_CH2, TIM5_CH2 alternate functions.
16 PA2 bidirectional GPIO PA2; supports USART2_TX, ADC_IN2, TIM2_CH3, TIM15_CH1 alternate functions.
17 PA3 bidirectional GPIO PA3; supports USART2_RX, ADC_IN3, TIM2_CH4, TIM15_CH2 alternate functions.
18 VSS power_in
19 VDD power_in
20 PA4 bidirectional GPIO PA4; supports SPI1_NSS, USART2_CK, DAC_OUT1, ADC_IN4 alternate functions.
21 PA5 bidirectional GPIO PA5; supports SPI1_SCK, DAC_OUT2, ADC_IN5 alternate functions.
22 PA6 bidirectional GPIO PA6 5V tolerant; supports SPI1_MISO, ADC_IN6, TIM3_CH1, TIM1_BKIN, TIM16_CH1 alternate functions.
23 PA7 bidirectional GPIO PA7 5V tolerant; supports SPI1_MOSI, ADC_IN7, TIM3_CH2, TIM1_CH1N, TIM17_CH1 alternate functions.
24 PC4 bidirectional GPIO PC4; supports ADC_IN14, TIM12_CH1 alternate functions.
25 PC5 bidirectional GPIO PC5; supports ADC_IN15, TIM12_CH2 alternate functions.
26 PB0 bidirectional GPIO PB0; supports ADC_IN8, TIM3_CH3, TIM1_CH2N, TIM13_CH1 alternate functions.
27 PB1 bidirectional GPIO PB1; supports ADC_IN9, TIM3_CH4, TIM1_CH3N, TIM14_CH1 alternate functions.
28 PB2 bidirectional GPIO PB2 5V tolerant; BOOT1 configuration pin.
29 PB10 bidirectional GPIO PB10 5V tolerant; supports I2C2_SCL, USART3_TX, TIM2_CH3, HDMI_CEC alternate functions.
30 PB11 bidirectional GPIO PB11 5V tolerant; supports I2C2_SDA, USART3_RX, TIM2_CH4 alternate functions.
31 VSS power_in
32 VDD power_in
33 PB12 bidirectional GPIO PB12 5V tolerant; supports SPI2_NSS, I2C2_SMBA, USART3_CK, TIM1_BKIN, TIM12_CH1 alternate functions.
34 PB13 bidirectional GPIO PB13 5V tolerant; supports SPI2_SCK, USART3_CTS, TIM1_CH1N, TIM12_CH2 alternate functions.
35 PB14 bidirectional GPIO PB14 5V tolerant; supports SPI2_MISO, TIM1_CH2N, USART3_RTS, TIM15_CH1 alternate functions.
36 PB15 bidirectional GPIO PB15 5V tolerant; supports SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2 alternate functions.
37 PC6 bidirectional GPIO PC6 5V tolerant; supports TIM3_CH1 alternate function.
38 PC7 bidirectional GPIO PC7 5V tolerant; supports TIM3_CH2 alternate function.
39 PC8 bidirectional GPIO PC8 5V tolerant; supports TIM13_CH1, TIM3_CH3 alternate functions.
40 PC9 bidirectional GPIO PC9 5V tolerant; supports TIM14_CH1, TIM3_CH4 alternate functions.
41 PA8 bidirectional GPIO PA8 5V tolerant; supports USART1_CK, TIM1_CH1, MCO alternate functions.
42 PA9 bidirectional GPIO PA9 5V tolerant; supports USART1_TX, TIM1_CH2, TIM15_BKIN alternate functions.
43 PA10 bidirectional GPIO PA10 5V tolerant; supports USART1_RX, TIM1_CH3, TIM17_BKIN alternate functions.
44 PA11 bidirectional GPIO PA11 5V tolerant; supports USART1_CTS, TIM1_CH4 alternate functions.
45 PA12 bidirectional GPIO PA12 5V tolerant; supports USART1_RTS, TIM1_ETR alternate functions.
46 PA13 bidirectional GPIO PA13 5V tolerant; JTMS/SWDIO debug interface pin.
47 VSS power_in
48 VDD power_in
49 PA14 bidirectional GPIO PA14 5V tolerant; JTCK/SWCLK debug interface pin.
50 PA15 bidirectional GPIO PA15 5V tolerant; JTDI debug pin, remappable to SPI3_NSS, TIM2_CH1_ETR, SPI1_NSS.
51 PC10 bidirectional GPIO PC10 5V tolerant; supports UART4_TX, USART3_TX alternate functions.
52 PC11 bidirectional GPIO PC11 5V tolerant; supports UART4_RX, USART3_RX alternate functions.
53 PC12 bidirectional GPIO PC12 5V tolerant; supports UART5_TX, USART3_CK alternate functions.
54 PD2 bidirectional GPIO PD2 5V tolerant; supports TIM3_ETR, UART5_RX alternate functions.
55 PB3 bidirectional GPIO PB3 5V tolerant; JTDO/TRACESWO debug pin, remappable to SPI3_SCK, TIM2_CH2, SPI1_SCK.
56 PB4 bidirectional GPIO PB4 5V tolerant; NJTRST debug pin, remappable to SPI3_MISO, TIM3_CH1, SPI1_MISO.
57 PB5 bidirectional GPIO PB5; supports I2C1_SMBA, SPI3_MOSI, TIM16_BKIN, TIM3_CH2, SPI1_MOSI alternate functions.
58 PB6 bidirectional GPIO PB6 5V tolerant; supports I2C1_SCL, TIM4_CH1, TIM16_CH1N, USART1_TX alternate functions.
59 PB7 bidirectional GPIO PB7 5V tolerant; supports I2C1_SDA, FSMC_NADV, TIM4_CH2, TIM17_CH1N, USART1_RX alternate functions.
60 BOOT0 input Boot configuration pin; selects boot from Flash, System Memory, or SRAM.
61 PB8 bidirectional GPIO PB8 5V tolerant; supports TIM4_CH3, TIM16_CH1, HDMI_CEC, I2C1_SCL alternate functions.
62 PB9 bidirectional GPIO PB9 5V tolerant; supports TIM4_CH4, TIM17_CH1, I2C1_SDA alternate functions.
63 VSS power_in
64 VDD power_in

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F100RCT6BTR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f100rct6btr-etched.step / stm32f100rct6btr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f100rct6btr.step / stm32f100rct6btr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (107 pp, sha256 37ac4e5d049f3b5d, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF