DMS2085LSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin	Name	Type	Function
1	A	passive	Schottky diode D1 anode (20V reverse voltage rating, 1.0A average rectified current), tied to pin 2.
2	A	passive	Schottky diode D1 anode (20V reverse voltage rating, 1.0A average rectified current), tied to pin 1.
3	S	passive	P-channel MOSFET Q1 source terminal; drain-source voltage rated -20V.
4	G	input	P-channel MOSFET Q1 gate terminal; gate-source voltage rated ±20V.
5	D	passive	P-channel MOSFET Q1 drain terminal, continuous drain current -3.3A at TA=+25°C, tied to pins 6.
6	D	passive	P-channel MOSFET Q1 drain terminal, continuous drain current -3.3A at TA=+25°C, tied to pin 5.
7	K	passive	Schottky diode D1 cathode (20V reverse voltage rating, 470mV max VF at 1.0A), tied to pin 8.
8	K	passive	Schottky diode D1 cathode (20V reverse voltage rating, 470mV max VF at 1.0A), tied to pin 7.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SO-8
Category	Transistors/Thyristors
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Breakdown Voltage	BVDSS	-20			V	VGS = 0V, ID = -250µA	3
Zero Gate Voltage Drain Current	IDSS			-1	µA	VDS = -20V, VGS = 0V	3
Gate-Source Leakage	IGSS			100	nA	VGS = ±20V, VDS = 0V	3
Gate Threshold Voltage	VGS(th)	-0.5	-1.5	-2.2	V	VDS = VGS, ID = -250µA	3
Static Drain-Source On-Resistance	RDS(ON)		70	85	mΩ	VGS = -10V, ID = -3.05A	3
Static Drain-Source On-Resistance	RDS(ON)		100	125	mΩ	VGS = -4.5V, ID = -1.50A	3
Diode Forward Voltage	VSD		-0.8	-1	V	VGS = 0V, IS = -1.0A	3
Reverse Breakdown Voltage	V(BR)R	20	35		V	IR = 1mA	6
Forward Voltage	VF			0.4	V	IF = 0.5A	6
Forward Voltage	VF			0.47	V	IF = 1.0A	6
Reverse Current	IR		30	80	μA	VR = 20V	6
Drain-Source Voltage	VDSS			-20	V	TA = +25°C, unless otherwise specified	2
Gate-Source Voltage	VGSS	-20		20	V	TA = +25°C, unless otherwise specified	2
Continuous Drain Current, steady state	ID			-3.3	A	VGS = 10V, steady state, TA = +25°C	2
Continuous Drain Current, steady state	ID			-2.7	A	VGS = 10V, steady state, TA = +70°C	2
Continuous Drain Current, t<10s	ID			-4.3	A	VGS = 10V, t<10s, TA = +25°C	2
Continuous Drain Current, t<10s	ID			-3.4	A	VGS = 10V, t<10s, TA = +70°C	2
Maximum Body Diode Forward Current	IS			-1.5	A	Note 6	2
Pulsed Drain Current	IDM			-11.2	A	10µs pulse, duty cycle = 1%	2
Avalanche Current	IAS			-12	A	L = 0.1mH, Note 7	2
Avalanche Energy	EAS			7	mJ	L = 0.1mH, Note 7	2
Peak Repetitive Reverse Voltage / Working Peak Reverse Voltage / DC Blocking Voltage	VRRM, VRWM, VR			20	V	Schottky D1	2
Average Rectified Output Current	IO			1	A	Note 7, t<10s	2
Peak Repetitive Forward Current	IFRM			2	A	Note 7, t<10s	2
Non-Repetitive Peak Forward Surge Current	IFSM			20	A	Single half sine-wave superimposed on rated load, Note 7, t<10s	2
Total Power Dissipation (Note 5)	PD			1.1	W	TA = +25°C, device on FR-4, minimum recommended pad layout	2
Total Power Dissipation (Note 5)	PD			0.7	W	TA = +70°C, device on FR-4, minimum recommended pad layout	2
Thermal Resistance, Junction to Ambient (Note 5)	RθJA			108	°C/W	Steady state, device on FR-4, minimum recommended pad layout	2
Thermal Resistance, Junction to Ambient (Note 5)	RθJA			65	°C/W	t<10s, device on FR-4, minimum recommended pad layout	2
Total Power Dissipation (Note 6)	PD			1.8	W	TA = +25°C, device on FR-4 with 1 inch square copper plate	2
Total Power Dissipation (Note 6)	PD			1	W	TA = +70°C, device on FR-4 with 1 inch square copper plate	2
Thermal Resistance, Junction to Ambient (Note 6)	RθJA			78	°C/W	Steady state, device on FR-4 with 1 inch square copper plate	2
Thermal Resistance, Junction to Ambient (Note 6)	RθJA			50	°C/W	t<10s, device on FR-4 with 1 inch square copper plate	2
Thermal Resistance, Junction to Case (Note 6)	RθJC			22	°C/W	Note 6	2
Operating and Storage Temperature Range	TJ, TSTG	-55		150	°C		2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	Copper	tin	 Terminal Connections: See Diagram  Terminals: Finish, Matte Tin Annealed over Copper Leadframe	1

CAD (land: KiCad; 3D: generated from the datasheet)

Symbol: DMS2085LSD-13
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8, generated on the KiCad land (body 3.85 x 4.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
3D model files: dms2085lsd-13-etched.step / dms2085lsd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dms2085lsd-13.step / dms2085lsd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (8 pp, sha256 7e781a05e1edaffe, retrieved 2026-11-13, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF

DMS2085LSD-13

Verified DMS2085LSD-13

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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