component
ME4056ASPG-N
Public Made by Adomby adom
MICRONE Battery Management, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownME4056ASPG-N
MICRONE · Battery Management · ESOP-8
ME4056ASPG-N from MICRONE, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature sense input. Connect to the wiper of an NTC divider referenced to VCC; charging stops if V(TEMP) drops below ~45% VCC or rises above ~80% VCC (over/under-temperature). Tie directly to GND to disable temperature monitoring. |
| 2 | PROG | passive | Charge-current program pin. A resistor R_PROG from this pin to GND sets the constant-current level per I_BAT = 1300 * V_PROG / R_PROG (V_PROG ≈ 1.0 V). Also used internally for charge-current monitoring and C/10 termination detection. |
| 3 | GND | power_in | Device ground / power return. The ESOP-8 exposed thermal pad should also connect to this net for heat dissipation. |
| 4 | VCC | power_in | Charger supply input (4.0-7.0 V, 5 V typical; keep ≤ 5.5 V for full 0.9 A charging). When VCC falls to within ~80 mV of BAT the internal pass FET shuts off and the device enters sleep mode with < 2 µA battery leakage. |
| 5 | BAT | power_out | Battery connection. Sources the charging current and regulates to V_FLOAT = 4.2 V (A suffix) or 4.34 V (D suffix) during constant-voltage phase. Bypass with a low-ESR capacitor to GND. |
| 6 | /STDBY | output | Charge-complete status indicator, open-drain, active-low. Internal N-MOS pulls low when charge termination is detected; high-impedance in all other states. Typically pulled up through an LED to VCC. |
| 7 | /CHRG | output | Charging status indicator, open-drain, active-low. Internal N-MOS pulls low while the battery is being charged; high-impedance otherwise. Typically pulled up through an LED to VCC. |
| 8 | CE | input | Chip-enable input, active-high, Schmitt-trigger. Drive high to enable normal charging; drive low to disable and place the device in low-current standby. Compatible with TTL/CMOS logic levels. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MICRONE |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
ME4056ASPG-NME4056ASPG-NDSPG-N
CAD (KiCad official)
- Symbol:
ME4056ASPG-N - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
me4056aspg-n-etched.step/me4056aspg-n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);me4056aspg-n.step/me4056aspg-n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MICRONE datasheet (17 pp, sha256
7fdf54d13dc3989b, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).