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CJL2311

Changjing · MOSFETs · SOT-23-6L

CJL2311 from Changjing, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Gate of MOSFET 1; gate-source voltage limited to ±12V (N-channel) or ±8V (P-channel) per the ratings table.
2 S2 passive Source of MOSFET 2 per the equivalent circuit.
3 G2 input Gate of MOSFET 2; gate-source voltage limited to ±12V (N-channel) or ±8V (P-channel) per the ratings table.
4 D2 passive Drain of MOSFET 2 per the equivalent circuit; VDS rated 20V (N-channel) or -20V (P-channel).
5 S1 passive Source of MOSFET 1 per the equivalent circuit.
6 D1 passive Drain of MOSFET 1 per the equivalent circuit; VDS rated 20V (N-channel) or -20V (P-channel).

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-23-6L
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-channel) VDS 20 V N-channel 1
Drain-Source Voltage (P-channel) VDS -20 V P-channel 1
Gate-Source Voltage (N-channel) VGS -12 12 V N-channel 1
Gate-Source Voltage (P-channel) VGS -8 8 V P-channel 1
Continuous Drain Current (N-channel) ID 4 A N-channel 1
Continuous Drain Current (P-channel) ID -2.3 A P-channel 1
Pulsed Drain Current (N-channel) IDM 12 A N-channel, note 1 1
Pulsed Drain Current (P-channel) IDM -10 A P-channel, note 1 1
Power Dissipation PD 1.1 W note 2: surface mounted on FR4 board, t < 5 sec 1
Operation Junction and Storage Temperature Range TJ,Tstg -55 150 ℃ 1
Thermal Resistance from Junction to Ambient RθJA 114 ℃/W 1
Drain-source breakdown voltage (N-channel) V(BR)DSS 20 V VGS = 0V, ID =250µA 2
Zero gate voltage drain current (N-channel, TJ=25℃) IDSS 1 µA VDS =20V,VGS = 0V,TJ=25℃ 2
Zero gate voltage drain current (N-channel, TJ=125℃) IDSS 1 mA VDS =20V,VGS = 0V,TJ=125℃ 2
Drain-source on-resistance (N-channel) RDS(on) 22 30 mΩ VGS =4.5V, ID =3.4A 2
Drain-source on-resistance (N-channel) RDS(on) 30 35 mΩ VGS =2.5V, ID =3A 2
Gate-source leakage current (N-channel) IGSS -100 100 nA VGS =±12V, VDS = 0V 2
Drain-source breakdown voltage (P-channel) V(BR)DSS -20 V VGS = 0V, ID =-250µA 3
Zero gate voltage drain current (P-channel, TJ=25℃) IDSS -1 µA VDS =-20V,VGS = 0V,TJ=25℃ 3
Zero gate voltage drain current (P-channel, TJ=125℃) IDSS -1 mA VDS =-20V,VGS = 0V,TJ=125℃ 3
Drain-source on-resistance (P-channel) RDS(on) 75 90 mΩ VGS =-4.5V, ID =-2.5A 3
Drain-source on-resistance (P-channel) RDS(on) 100 125 mΩ VGS =-2.5V, ID =-2A 3
Drain-source on-resistance (P-channel) RDS(on) 250 350 mΩ VGS =-1.8V, ID =-1.6A 3
Gate threshold voltage (P-channel) VGS(th) -1 -0.4 V VDS =VGS, ID =-250µA 3
Gate-source leakage current (P-channel) IGSS -100 100 nA VGS =±8V, VDS = 0V 3
Gate threshold voltage (N-channel) VGS(th) 1 V VDS =VGS, ID =250µA 2
Forward transconductance (N-channel) gFS 4.5 S VDS =10V, ID =3.4A 2
Input capacitance (N-channel) Ciss 480 pF VGS =0V,VDS =10V,f =1MHz 2
Output capacitance (N-channel) Coss 90 pF VGS =0V,VDS =10V,f =1MHz 2
Reverse transfer capacitance (N-channel) Crss 80 pF VGS =0V,VDS =10V,f =1MHz 2
Total Gate Charge (N-channel) Qg 6.2 nC VDS=10V,VGS=4.5V,ID=3.4A 2
Gate-Source Charge (N-channel) Qgs 0.5 nC VDS=10V,VGS=4.5V,ID=3.4A 2
Gate-Drain Charge (N-channel) Qgd 1.7 nC VDS=10V,VGS=4.5V,ID=3.4A 2
Forward transconductance (P-channel) gFS 4 S VDS =-5V, ID =-2.8A 3
Input capacitance (P-channel) Ciss 363 pF VGS =0V,VDS =-10V,f =1MHz 3
Output capacitance (P-channel) Coss 70 pF VGS =0V,VDS =-10V,f =1MHz 3
Reverse transfer capacitance (P-channel) Crss 60 pF VGS =0V,VDS =-10V,f =1MHz 3
Turn-on delay time (P-channel) td(on) 9 ns VDD=-10V,VGEN=-4.5V,ID=-1A RL=10Ω,RGEN=1Ω 3
Turn-on rise time (P-channel) tr 33 ns VDD=-10V,VGEN=-4.5V,ID=-1A RL=10Ω,RGEN=1Ω 3
Turn-off delay time (P-channel) td(off) 29 ns VDD=-10V,VGEN=-4.5V,ID=-1A RL=10Ω,RGEN=1Ω 3
Turn-off fall time (P-channel) tf 9 ns VDD=-10V,VGEN=-4.5V,ID=-1A RL=10Ω,RGEN=1Ω 3
Total Gate Charge (P-channel) Qg 5.5 nC VDS=-10V,VGS=-2.5V,ID=-3A 3
Gate-Source Charge (P-channel) Qgs 0.7 nC VDS=-10V,VGS=-2.5V,ID=-3A 3
Gate-Drain Charge (P-channel) Qgd 1.3 nC VDS=-10V,VGS=-2.5V,ID=-3A 3
Diode forward voltage (P-channel) VDS -1.2 V IS=-0.7A,VGS=0V 3

CAD (KiCad official)

  • Symbol: CJL2311
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: cjl2311-etched.step / cjl2311-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cjl2311.step / cjl2311.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (7 pp, sha256 5db3e59a97fc6010, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF