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RF430CL331HIPWR

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Texas Instruments RF Chips, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

RF430CL331HIPWR

Texas Instruments · RF Chips · TSSOP-14

RF430CL331HIPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in 3.3-V power supply, recommended 3.0 V to 3.6 V with no RF field present and 2.0 V to 3.6 V with RF field present.
2 ANT1 passive Antenna input 1 (RF, analog) for the 13.56 MHz resonant LC circuit, with antenna input voltage up to 3.6 V peak.
3 ANT2 passive Antenna input 2 (RF, analog) for the 13.56 MHz resonant LC circuit, with antenna input voltage up to 3.6 V peak.
4 RST input Active-low reset input with an integrated pullup resistor (20 kΩ min, 35 kΩ typ, 50 kΩ max).
5 E0 input I2C address select 0 input.
6 E1 input I2C address select 1 input.
7 E2 input I2C address select 2 input.
8 INTO output Interrupt output to the host.
9 I2C_READY output High indicates that I2C communication can be started; low indicates that I2C communication must not be started.
10 I2C_SIGNAL output Low indicates that a wait time extension command is automatically being sent; I2C communication does not have to be stopped.
11 SCL bidirectional I2C clock line.
12 SDA bidirectional I2C data line.
13 VCORE power_out Regulated core supply voltage, requiring a low-ESR capacitor of 0.1 µF min, 0.47 µF nominal, 1 µF max.
14 VSS power_in Ground supply (0 V reference).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Radio Frequency Chip/Antenna
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage at VCC VAMR -0.3 4.1 V referenced to VSS 7
Voltage at VANT VAMR -0.3 4.1 V referenced to VSS 7
Voltage applied to any pin -0.3 V max is VCC + 0.3, references to VSS 7
Diode current at any device pin -2 2 mA ±2 7
Storage temperature Tstg -40 125 °C 7
ESD HBM V(ESD) -2000 2000 V Human-body model, ANSI/ESDA/JEDEC JS-001 7
ESD CDM V(ESD) -500 500 V Charged-device model, JESD22-C101 7
Supply voltage, no RF field VCC 3 3.3 3.6 V During program execution no RF field present 7
Supply voltage, RF field VCC 2 3.3 3.6 V During program execution with RF field present 7
Operating free-air temperature TA -40 85 °C 7
Capacitor on VCORE CVCORE 0.1 0.47 1 µF Low ESR capacitor 7
Antenna input voltage VANT_peak 3.6 V 7
Impedance of LC circuit Z 6.5 15.5 kΩ 7
Supply voltage (GND reference) VSS 0 V 7
Decoupling capacitor on VCC C1 0.1 µF Low ESR capacitor 7
Decoupling capacitor on VCC C2 1 µF Low ESR capacitor 7
Carrier frequency fc 13.56 MHz 7
Coil inductance LRES 2.66 µH 7
Total resonance capacitance CRES 51.8 pF CRES = CIN + CTune 7
Tank quality factor QT 30 7
Standby supply current ICC(Standby) 10 45 µA Standby enable = 1, RF disabled, no serial communication, VCC 3.3 V 8
I2C supply current ICC(I2C) 250 µA I2C, 400 kHz, Writing into NDEF memory, VCC 3.3 V 8
RF enabled supply current ICC(RF enabled) 40 µA RF enabled, no RF field present, VCC 3.3 V 8
Inactive supply current ICC(Inactive) 15 µA Standby enable = 0, RF disabled, no serial communication, VCC 3.3 V 8
Additional current with strong RF field ΔICC(StrongRF) 160 µA VCC 3.0 V to 3.6 V 8
Current drawn from VCC with RF field ICC(RF,lowVCC) 0 µA VCC < 3.0 V with RF field present (passive operation), 2.0 V to 3.0 V 8
High-impedance leakage current IL -50 50 nA VCC 3.3 V 8
Integrated RST pullup resistor RPU(RST) 20 35 50 kΩ 8
Output low voltage VOL 0.4 V IOL = 3 mA, VCC 3 V / 3.3 V / 3.6 V 8
Output high voltage, VCC 3 V VOH 2.6 V IOH = -3 mA, VCC 3 V 8
Output high voltage, VCC 3.3 V VOH 2.9 V IOH = -3 mA, VCC 3.3 V 8
Output high voltage, VCC 3.6 V VOH 3.2 V IOH = -3 mA, VCC 3.6 V 8
Antenna rectified voltage VDDH 3 3.3 3.6 V Peak voltage limited by antenna limiter 11
Antenna load current IDDH 100 µA RMS, without limiter current 11
Input capacitance CIN 31.5 35 38.5 pF ANT1 to ANT2, 2 V RMS 11
Input signal data rate DR10 106 848 kbps 10% downlink modulation, 7% to 30% ASK, ISO1443B 11
Modulation depth m10 7 30 % 10%, tested as defined in ISO/IEC 10373-6 11
Uplink subcarrier modulation frequency fPICC 0.2 1 MHz 11
Modulated antenna voltage VA_MOD 0.5 V VA_unmod = 2.3 V 11
Limiter clamping voltage VLIM 3 3.6 Vpk ILIM ≤ 70 mA RMS, f = 13.56 MHz 11
Maximum limiter current ILIM,MAX 70 mA 11
Time until ready for I2C tReady 20 ms After power up or reset 10
SCL clock frequency fSCL 0 400 kHz Master supporting clock stretching, or device not being addressed, 3.3 V 10
SCL clock frequency, write fSCL 0 120 kHz Device addressed by Master not supporting clock stretching, Write, 3.3 V 10
SCL clock frequency, read fSCL 0 100 kHz Device addressed by Master not supporting clock stretching, Read, 3.3 V 10
Hold time (repeated) START, ≤100 kHz tHD,STA 4 µs fSCL ≤ 100 kHz, 3.3 V 10
Hold time (repeated) START, >100 kHz tHD,STA 0.6 µs fSCL > 100 kHz, 3.3 V 10
Setup time repeated START, ≤100 kHz tSU,STA 4.7 µs fSCL ≤ 100 kHz, 3.3 V 10
Setup time repeated START, >100 kHz tSU,STA 0.6 µs fSCL > 100 kHz, 3.3 V 10
Data hold time tHD,DAT 0 ns 3.3 V 10
Data setup time tSU,DAT 250 ns 3.3 V 10
Setup time for STOP tSU,STO 4 µs 3.3 V 10
Pulse duration of spikes suppressed by input filter tSP 6.25 75 ns 3.3 V 10
Junction-to-ambient thermal resistance RθJA 116 °C/W TSSOP-14 (PW), still air 9
Junction-to-case (top) thermal resistance RθJC(TOP) 45.1 °C/W TSSOP-14 (PW) 9
Junction-to-board thermal resistance RθJB 57.6 °C/W TSSOP-14 (PW) 9
Junction-to-board thermal characterization parameter ΨJB 57 °C/W TSSOP-14 (PW) 9
Junction-to-top thermal characterization parameter ΨJT 4.6 °C/W TSSOP-14 (PW) 9

CAD (KiCad official)

  • Symbol: RF430CL331HIPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: rf430cl331hipwr-etched.step / rf430cl331hipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rf430cl331hipwr.step / rf430cl331hipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (63 pp, sha256 b632205682c6379f, retrieved 2026-10-23, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF