component
IXDD630MYI
Public Made by Adomby adom
IXYS Pre-ordered Chips, TO-263-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownIXDD630MYI
IXYS · Pre-ordered Chips · TO-263-5
IXDD630MYI from IXYS, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage pin that powers the device; absolute maximum VCC is 40 V (minimum -0.3 V), recommended operation is from UVLO to 35 V, and the IXD_630M (9 V UVLO) version used by IXDD630MYI turns on at a rising VCC of 9 V typical. |
| 2 | IN | input | Logic input; VIH is 3.5 V minimum and VIL is 0.8 V maximum for UVLO < VCC < 18 V, input current is limited to ±10 µA, and the input withstands a negative swing down to -5 V. |
| 3 | GND | power_in | Common ground reference for the device. |
| 4 | OUT | output | Output that sources or sinks current to turn a discrete MOSFET or IGBT on or off, rated for 30 A peak, with continuous output current limited to ±8 A by package power dissipation. |
| 5 | EN | input | Output enable on the IXDD630 only; driving it low disables the output and forces it to a high-impedance state, with EN input high at 2/3 VCC minimum, low at 1/3 VCC maximum, and an internal pull-up of about 400 kΩ. |
| 6 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | IXYS |
| Package | TO-263-5 |
| Category | Interface ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (absolute maximum) | VCC | -0.3 | 40 | V | 3 | ||
| Input Voltage Range (absolute maximum) | VIN, VEN | -5 | V | 3 | |||
| Output Current (absolute maximum) | IOUT | -30 | 30 | A | 3 | ||
| Junction Temperature (absolute maximum) | TJ | -55 | 150 | °C | 3 | ||
| Storage Temperature (absolute maximum) | TSTG | -65 | 150 | °C | 3 | ||
| Supply Voltage (recommended operating) | VCC | 35 | V | Minimum given as UVLO (not numeric) | 4 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 4 | ||
| Input Voltage, High | VIH | 3.5 | V | UVLO < VCC < 18V | 4 | ||
| Input Voltage, Low | VIL | 0.8 | V | UVLO < VCC < 18V | 4 | ||
| Input Current | IIN | -10 | 10 | A | 0V < VIN < VCC | 4 | |
| Output Voltage, Low | VOL | 0.025 | V | 4 | |||
| Output Resistance, High State | ROH | 0.17 | 0.4 | Ω | VCC=18V, IOUT= -100mA | 4 | |
| Output Resistance, Low State | ROL | 0.16 | 0.3 | Ω | VCC=18V, IOUT=100mA | 4 | |
| Output Current, Continuous | IDC | -8 | 8 | A | Limited by package power dissipation | 4 | |
| Rise Time | tr | 11 | 20 | ns | CLOAD=5.6nF, VCC=18V | 4 | |
| Fall Time | tf | 11 | 18 | ns | CLOAD=5.6nF, VCC=18V | 4 | |
| On-Time Propagation Delay | tondly | 46 | 65 | ns | CLOAD=5.6nF, VCC=18V | 4 | |
| Off-Time Propagation Delay | toffdly | 46 | 65 | ns | CLOAD=5.6nF, VCC=18V | 4 | |
| Output Enable Time | tPZL, tPZH | 34 | 65 | ns | IXDD630 only | 4 | |
| Output Disable Time | tPLZ, tPHZ | 65 | 125 | ns | IXDD630 only | 4 | |
| Enable Pull-Up Resistor | REN | 400 | k | IXDD630 only | 4 | ||
| Power Supply Current (VIN=3.5V) | ICC | 2.5 | 4 | mA | VCC=18V, VIN=3.5V | 4 | |
| Power Supply Current (VIN=0V) | ICC | 0.75 | mA | VCC=18V, VIN=0V | 4 | ||
| Power Supply Current (VIN=VCC) | ICC | 0.75 | mA | VCC=18V, VIN=VCC | 4 | ||
| Under-Voltage Lockout Threshold, VCC Rising (IXD_630M) | UVLO | 7 | 9 | 9.9 | V | VCC Rising, IXD_630M | 4 |
| Under-Voltage Lockout Hysteresis (IXD_630M) | 1 | V | IXD_630M | 4 | |||
| Input Voltage, High (-40°C to +125°C) | VIH | 4 | V | UVLO < VCC < 18V | 5 | ||
| Input Voltage, Low (-40°C to +125°C) | VIL | 0.8 | V | UVLO < VCC < 18V | 5 | ||
| Output Resistance, High State (-40°C to +125°C) | ROH | 0.6 | Ω | VCC=18V, IOUT= -100mA | 5 | ||
| Output Resistance, Low State (-40°C to +125°C) | ROL | 0.45 | Ω | VCC=18V, IOUT=100mA | 5 | ||
| Rise Time (-40°C to +125°C) | tr | 35 | ns | CLOAD=5.6nF, VCC=18V | 5 | ||
| Fall Time (-40°C to +125°C) | tf | 35 | ns | CLOAD=5.6nF, VCC=18V | 5 | ||
| On-Time Propagation Delay (-40°C to +125°C) | tondly | 100 | ns | CLOAD=5.6nF, VCC=18V | 5 | ||
| Off-Time Propagation Delay (-40°C to +125°C) | toffdly | 100 | ns | CLOAD=5.6nF, VCC=18V | 5 | ||
| Thermal Impedance, Junction-to-Ambient (5-Lead TO-263) | θJA | 46 | °C/W | IXD_630YI (5-Lead TO-263) | 5 | ||
| Thermal Impedance, Junction-to-Case (5-Lead TO-263) | θJC | 2 | °C/W | IXD_630YI (5-Lead TO-263) | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of prod | 10 |
CAD (KiCad official)
- Symbol:
IXDD630MYI - Footprint:
Package_TO_SOT_SMD:TO-263-5_TabPin6 - 3D model: TO-263-5 (KiCad packages3D, STEP)
- 3D model files:
ixdd630myi-etched.step/ixdd630myi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ixdd630myi.step/ixdd630myi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: IXYS datasheet (12 pp, sha256
cee013af6c2f43a5, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).