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GT74LVC1G14S5

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by Ray

GTIC Inverters, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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GT74LVC1G14S5

GTIC · Inverters · SOT-23-5

GT74LVC1G14S5 from GTIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to VCC/GND per board convention.
2 A input Schmitt-trigger logic input. Positive-going threshold VT+ typ ~1.7 V and negative-going VT- typ ~0.9 V at VCC = 3.3 V (ΔVT typ ~0.8 V). Input voltage range 0 V to 5.5 V regardless of VCC (5 V tolerant). Input clamp current limited to -50 mA.
3 GND power_in Ground reference (0 V). Continuous current through GND is limited to ±100 mA.
4 Y output Inverter output, Y = /A. CMOS push-pull drive with IOH/IOL = ±24 mA at VCC = 3 V (up to ±32 mA at VCC = 4.5 V). Propagation delay tpd typ 1.9 ns at VCC = 3.3 V. High-Z during partial power-down (Ioff mode).
5 VCC power_in Positive supply, 1.65 V to 5.5 V (absolute max 6.5 V). Quiescent ICC ≤ 10 µA. Bypass with a 0.1 µF ceramic close to the pin.

Key specifications

Parameter Value
Manufacturer GTIC
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • GT74LVC1G14S5
  • GT74LVC1G14S5C5

CAD (KiCad official)

  • Symbol: GT74LVC1G14S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GTIC datasheet (13 pp, sha256 fa9297785391f824, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF