Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

AO4466

UMW · MOSFETs · SOP-8

AO4466 from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal; pins 1, 2 and 3 are all source leads, separated so a Kelvin connection can bypass source inductance.
2 S passive Source terminal; pins 1, 2 and 3 are all source leads, separated so a Kelvin connection can bypass source inductance.
3 S passive Source terminal; pins 1, 2 and 3 are all source leads, separated so a Kelvin connection can bypass source inductance.
4 G input Gate terminal of the N-channel MOSFET; the absolute maximum gate-source voltage is ±20 V.
5 D passive Drain terminal; pins 5 to 8 are the common drain, with a drain-source voltage rating of 30 V.
6 D passive Drain terminal; pins 5 to 8 are the common drain, with a drain-source voltage rating of 30 V.
7 D passive Drain terminal; pins 5 to 8 are the common drain, with a drain-source voltage rating of 30 V.
8 D passive Drain terminal; pins 5 to 8 are the common drain, with a drain-source voltage rating of 30 V.

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 30 V ID=250µA, VGS=0V 3
Gate-Body Leakage Current IGSS -100 100 nA VDS=0V, VGS=±20V 3
Static Drain-Source On-Resistance (VGS=10V) RDS(ON) 18 mΩ VGS=10V, ID=10A 3
Static Drain-Source On-Resistance (VGS=4.5V) RDS(ON) 25 mΩ VGS=4.5V, ID=5A 3
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 10 A TA=25°C 1
Continuous Drain Current ID 7 A TA=70°C 1
Pulsed Drain Current IDM 64 A 1
Avalanche Current IAR 12 A 1
Repetitive Avalanche Energy EAR 7 mJ L=0.1mH 1
Power Dissipation PD 3.1 W TA=25°C 1
Power Dissipation PD 2 W TA=70°C 1
Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Maximum Junction-to-Ambient (t ≤ 10s) RθJA 36 40 °C/W t ≤ 10s 2
Maximum Junction-to-Ambient (Steady-State) RθJA 62 75 °C/W Steady-State 2
Maximum Junction-to-Lead RθJL 18 24 °C/W Steady-State 2

CAD (KiCad official)

  • Symbol: AO4466
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ao4466-etched.step / ao4466-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ao4466.step / ao4466.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (11 pp, sha256 bf7a10f8d03d3125, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF