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SN74CB3Q3251PW
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Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74CB3Q3251PW
Texas Instruments · Signal Switches, Multiplexers, Decoders · TSSOP-16
SN74CB3Q3251PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B4 | bidirectional | Switch I/O port B4, connected to the A port when OE is low and S2, S1, S0 select channel 4 (L, H, H). |
| 2 | B3 | bidirectional | Switch I/O port B3, connected to the A port when OE is low and S2, S1, S0 select channel 3 (L, H, L). |
| 3 | B2 | bidirectional | Switch I/O port B2, connected to the A port when OE is low and S2, S1, S0 select channel 2 (L, L, H). |
| 4 | B1 | bidirectional | Switch I/O port B1, connected to the A port when OE is low and S2, S1, S0 select channel 1 (L, L, L). |
| 5 | A | bidirectional | Common switch I/O port A, a 5V-tolerant data port that switches rail-to-rail (0 to 5V with VCC 3.3V, 0 to 3.3V with VCC 2.5V) to the selected B port. |
| 6 | NC | unconnected | No internal connection. |
| 7 | OE | input | Active-low output enable; when high, the A and B ports are disconnected (high-impedance), and it must be pulled up to VCC through a resistor to hold high-impedance during power up or down. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | S2 | input | Select input bit 2 of the 1-of-8 multiplexer; its TTL or 5V/3.3V CMOS level chooses the channel together with S1 and S0. |
| 10 | S1 | input | Select input bit 1 of the 1-of-8 multiplexer; its TTL or 5V/3.3V CMOS level chooses the channel together with S2 and S0. |
| 11 | S0 | input | Select input bit 0 of the 1-of-8 multiplexer; its TTL or 5V/3.3V CMOS level chooses the channel together with S2 and S1. |
| 12 | B8 | bidirectional | Switch I/O port B8, connected to the A port when OE is low and S2, S1, S0 select channel 8 (H, H, H). |
| 13 | B7 | bidirectional | Switch I/O port B7, connected to the A port when OE is low and S2, S1, S0 select channel 7 (H, H, L). |
| 14 | B6 | bidirectional | Switch I/O port B6, connected to the A port when OE is low and S2, S1, S0 select channel 6 (H, L, H). |
| 15 | B5 | bidirectional | Switch I/O port B5, connected to the A port when OE is low and S2, S1, S0 select channel 5 (H, L, L). |
| 16 | VCC | power_in | Supply voltage, specified from 2.3V to 3.6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 4.6 | V | 5 | ||
| Control input voltage range | VIN | -0.5 | 7 | V | 5 | ||
| Switch I/O voltage range | VI/O | -0.5 | 7 | V | 5 | ||
| Control input clamp current | IIK | -50 | mA | VIN < 0 | 5 | ||
| I/O port clamp current | II/OK | -50 | mA | VI/O < 0 | 5 | ||
| ON-state switch current | II/O | -64 | 64 | mA | 5 | ||
| Continuous current through VCC or GND | -100 | 100 | mA | 5 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| ESD human body model | V(ESD) | -2000 | 2000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 5 | |
| ESD charged-device model | V(ESD) | -1000 | 1000 | V | CDM, per JEDEC JESD22 C101 | 5 | |
| Supply voltage | VCC | 2.3 | 3.6 | V | 5 | ||
| High-level control input voltage | VIH | 1.7 | 5.5 | V | VCC = 2.3V to 2.7V | 5 | |
| High-level control input voltage | VIH | 2 | 5.5 | V | VCC = 2.7V to 3.6V | 5 | |
| Low-level control input voltage | VIL | 0 | 0.7 | V | VCC = 2.3V to 2.7V | 5 | |
| Low-level control input voltage | VIL | 0 | 0.8 | V | VCC = 2.7V to 3.6V | 5 | |
| Data input/output voltage | VI/O | 0 | 5.5 | V | 5 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 5 | ||
| Clamp voltage | VIK | -1.8 | V | VCC = 3.6V, II = -18mA | 7 | ||
| Control input leakage current | IIN | -1 | 1 | μA | Control inputs, VCC = 3.6V, VIN = 0 to 5.5V | 7 | |
| Off-state leakage current | IOZ | -1 | 1 | μA | VCC = 3.6V, VO = 0 to 5.5V, VI = 0, Switch OFF, VIN = VCC or GND | 7 | |
| Power-off leakage current | Ioff | 1 | μA | VCC = 0, VO = 0 to 5.5V, VI = 0 | 7 | ||
| Supply current | ICC | 1 | 4 | mA | VCC = 3.6V, II/O = 0, Switch ON or OFF, VIN = VCC or GND | 7 | |
| Supply current increase per control input | ΔICC | 30 | μA | Control inputs, VCC = 3.6V, One input at 3V, Other inputs at VCC or GND | 7 | ||
| Dynamic supply current per control input | ICCD | 0.3 | 0.45 | mA/MHz | Per control input, VCC = 3.6V, A and B ports open, Control input switching at 50% duty cycle | 7 | |
| Control input capacitance | Cin | 2.5 | 4.5 | pF | Control inputs, VCC = 3.3V, VIN = 5.5V, 3.3V, or 0 | 7 | |
| Input/output capacitance, OFF-state | Cio(OFF) | 19.5 | 25 | pF | A port, VCC = 3.3V, Switch OFF, VIN = VCC or GND, VI/O = 5.5V, 3.3V, or 0 | 7 | |
| Input/output capacitance, OFF-state | Cio(OFF) | 3.5 | 4.5 | pF | B port, VCC = 3.3V, Switch OFF, VIN = VCC or GND, VI/O = 5.5V, 3.3V, or 0 | 7 | |
| Input/output capacitance, ON-state | Cio(ON) | 15 | 19 | pF | VCC = 3.3V, Switch ON, VIN = VCC or GND, VI/O = 5.5V, 3.3V, or 0 | 7 | |
| ON-state resistance | ron | 4 | 10 | Ω | VCC = 2.3V, VI = 0, IO = 30mA | 7 | |
| ON-state resistance | ron | 4.5 | 11 | Ω | VCC = 2.3V, VI = 1.7V, IO = -15mA | 7 | |
| ON-state resistance | ron | 3.5 | 8 | Ω | VCC = 3V, VI = 0, IO = 30mA | 7 | |
| Maximum switching frequency, control input | fOE or fS | 10 | 20 | MHz | OE or S to A or B, VCC = 2.5V ±0.2V and 3.3V ±0.3V (merged cells) | 7 | |
| Propagation delay | tpd | 0.12 | 0.18 | ns | A or B to B or A, VCC = 2.5V ±0.2V and 3.3V ±0.3V (merged cells) | 7 | |
| Propagation delay (switch) | tpd(s) | 1.5 | 8.7 | ns | S to A, VCC = 2.5V ±0.2V | 7 | |
| Propagation delay (switch) | tpd(s) | 1.5 | 6.8 | ns | S to A, VCC = 3.3V ±0.3V | 7 | |
| Enable time | ten | 1.5 | 10.2 | ns | S to B, VCC = 2.5V ±0.2V | 7 | |
| Enable time | ten | 1.5 | 7.6 | ns | S to B, VCC = 3.3V ±0.3V | 7 | |
| Enable time | ten | 1.5 | 10.4 | ns | OE to A or B, VCC = 2.5V ±0.2V | 7 | |
| Enable time | ten | 1.5 | 8 | ns | OE to A or B, VCC = 3.3V ±0.3V | 7 | |
| Disable time | tdis | 0.5 | 11 | ns | S to B, VCC = 2.5V ±0.2V | 7 | |
| Disable time | tdis | 0.5 | 7.4 | ns | S to B, VCC = 3.3V ±0.3V | 7 | |
| Disable time | tdis | 0.5 | 10.8 | ns | OE to A or B, VCC = 2.5V ±0.2V | 7 | |
| Disable time | tdis | 0.5 | 8.7 | ns | OE to A or B, VCC = 3.3V ±0.3V | 7 | |
| Package thermal impedance, PW package | θJA | 108 | °C/W | PW package, per JESD 51-5 | 5 | ||
| Junction-to-ambient thermal resistance, PW (TSSOP) | RθJA | 114.3 | °C/W | PW (TSSOP) package | 6 |
CAD (KiCad official)
- Symbol:
SN74CB3Q3251PW - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74cb3q3251pw-etched.step/sn74cb3q3251pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74cb3q3251pw.step/sn74cb3q3251pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
c17910e9e247dc05, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).