component
FDMS86163P
Public Made by Adomby adom
Leiditech MOSFETs, DFN-8(4.9x5.7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFDMS86163P
Leiditech · MOSFETs · DFN-8(4.9x5.7)
FDMS86163P from Leiditech, in a DFN-8(4.9x5.7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET (pin 1, marked by the dot/Pin1 arrow); VDS rating is -100V and continuous drain current is -50A at TC=25℃. |
| 2 | S | passive | Source terminal of the P-channel MOSFET, shared with pins 1 and 3. |
| 3 | S | passive | Source terminal of the P-channel MOSFET, shared with pins 1 and 2. |
| 4 | G | input | Gate terminal; absolute maximum gate-source voltage is ±20V, with a threshold of -1.0 to -2.5V and operation with gate voltages as low as 4.5V. |
| 5 | D | passive | Drain terminal, connected to the exposed drain pad; VDS is -100V maximum and pulsed drain current is -150A. |
| 6 | D | passive | Drain terminal, shared with pins 5, 7 and 8 and the drain pad. |
| 7 | D | passive | Drain terminal, shared with pins 5, 6 and 8 and the drain pad. |
| 8 | D | passive | Drain terminal, shared with pins 5, 6 and 7 and the drain pad. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | DFN-8(4.9x5.7) |
| Category | Transistors/Thyristors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | V(BR)DSS | -100 | V | VGS=0V, ID=-250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS=-100V, VGS=0V | 2 | ||
| Gate to Body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 2 | |
| Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VDS=VGS, ID=-250μA | 2 |
| Static Drain-Source on-Resistance | RDS(on) | 40 | 52 | mΩ | VGS=-10V, ID=-20A | 2 | |
| Static Drain-Source on-Resistance | RDS(on) | 44 | 62 | mΩ | VGS=-4.5V, ID=-10A | 2 | |
| Maximum Continuous Drain to Source Diode Forward Current | IS | -35 | A | 2 | |||
| Maximum Pulsed Drain to Source Diode Forward Current | ISM | -140 | A | 2 | |||
| Drain to Source Diode Forward Voltage | VSD | -1.2 | V | VGS=0V, IS=-30A | 2 | ||
| Drain-Source Voltage | VDS | -100 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -50 | A | TC=25℃, VGS @ -10V | 1 | ||
| Continuous Drain Current | ID | -28 | A | TC=100℃, VGS @ -10V | 1 | ||
| Pulsed Drain Current | IDM | -150 | A | Note 2: pulse width ≤300us, duty cycle ≤2% | 1 | ||
| Single Pulse Avalanche Energy | EAS | 87 | mJ | VDD=-25V, VGS=-10V, L=0.1mH, IAS=-24A (Note 3) | 1 | ||
| Avalanche Current | IAS | -35 | A | 1 | |||
| Total Power Dissipation | PD | 140 | W | TC=25℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-Ambient | RθJA | 25 | ℃/W | Surface mounted on 1 inch² FR-4 board, 2OZ copper (Note 1) | 1 | ||
| Thermal Resistance Junction-Case | RθJC | 1.1 | ℃/W | Note 1 | 1 |
CAD (KiCad official)
- Symbol:
FDMS86163P - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(4.9x5.7) (KiCad packages3D, STEP)
- 3D model files:
fdms86163p-etched.step/fdms86163p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fdms86163p.step/fdms86163p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (5 pp, sha256
1e0a1057af3513f6, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).