Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

LMUN2111LT1G

LRC · Digital Transistors · SOT-23

LMUN2111LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Monolithic bias resistor transistor base input with integrated 10kΩ series base resistor and 10kΩ base-emitter pull-down resistor.
2 EMITTER power_in Emitter; ground reference pin providing low-impedance return path for collector and base currents.
3 COLLECTOR output Collector output; delivers switched collector current up to 100mA at collector-emitter voltage maximum of 50Vdc.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Voltage VCBO 50 Vdc 1
Collector-Emitter Voltage VCEO 50 Vdc 1
Collector Current IC 100 mAdc 1
Total Device Dissipation (FR-4 @ Minimum Pad) PD 246 mW TA = 25°C, FR-4 @ Minimum Pad (Note 1) 1
Total Device Dissipation (FR-4 @ 1.0 x 1.0 inch Pad) PD 400 mW TA = 25°C, FR-4 @ 1.0 x 1.0 inch Pad (Note 2) 1
Thermal Resistance Junction-to-Ambient (FR-4 @ Minimum Pad) RθJA 508 °C/W FR-4 @ Minimum Pad (Note 1) 1
Thermal Resistance Junction-to-Ambient (FR-4 @ 1.0 x 1.0 inch Pad) RθJA 311 °C/W FR-4 @ 1.0 x 1.0 inch Pad (Note 2) 1
Thermal Resistance Junction-to-Lead (FR-4 @ Minimum Pad) RθJL 174 °C/W FR-4 @ Minimum Pad (Note 1) 1
Thermal Resistance Junction-to-Lead (FR-4 @ 1.0 x 1.0 inch Pad) RθJL 208 °C/W FR-4 @ 1.0 x 1.0 inch Pad (Note 2) 1
Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
DC Current Gain hFE 35 60 VCE = 10 V, IC = 5.0 mA 3
Collector-Emitter Saturation Voltage VCE(sat) 0.25 Vdc IC = 10 mA, IB = 0.3 mA 3
Collector-Base Cutoff Current ICBO 100 nAdc 3
Collector-Emitter Cutoff Current ICEO 500 nAdc VCE = 50 V, IB = 0 3
Emitter-Base Cutoff Current IEBO 0.5 mAdc VEB = 6.0 V, IC = 0 3
Collector-Base Breakdown Voltage V(BR)CBO 50 Vdc IC = 10 µA, IE = 0 3
Collector-Emitter Breakdown Voltage V(BR)CEO 50 Vdc IC = 2.0 mA, IB = 0 3
Output Voltage (on) VOL 0.2 Vdc VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ 4
Output Voltage (off) VOH 4.9 Vdc VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ 4
Input Resistor R1 R1 7 10 13 kΩ 4
Resistor Ratio R1/R2 0.8 1 1.2 4
Bias Resistor R2 (nominal) R2 10 kΩ 2

CAD (KiCad official)

  • Symbol: LMUN2111LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lmun2111lt1g-etched.step / lmun2111lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmun2111lt1g.step / lmun2111lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (16 pp, sha256 af33d5c787db0c28, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF