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ISL3243EIRZ-T

Public Made by Adom

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RENESAS Pre-ordered Chips, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsisl3243eirz-tfactory-2.0.0extractor-text

Verified ISL3243EIRZ-T

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ISL3243EIRZ-T · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 16-page datasheet
  • ✓distributor: lcsc C2672193, digikey 20-ISL3243EIRZ-TTR-ND, mouser 968-ISL3243EIRZ-T
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-8rcgqgtr/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare (datasheet p.16)
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ isl3243eirz-t.kicad_sym✓ isl3243eirz-t.kicad_mod✓ isl3243eirz-t.step
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Contents

README

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ISL3243EIRZ-T

RENESAS · Pre-ordered Chips · QFN-32-EP(5x5)

ISL3243EIRZ-T from RENESAS, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R1IN input ±15kV ESD protected, RS-232 compatible receiver 1 input.
2 R2IN input ±15kV ESD protected, RS-232 compatible receiver 2 input.
3 R3IN input ±15kV ESD protected, RS-232 compatible receiver 3 input.
4 R4IN input ±15kV ESD protected, RS-232 compatible receiver 4 input.
5 R5IN input ±15kV ESD protected, RS-232 compatible receiver 5 input.
6 T1OUT output ±15kV ESD protected, RS-232 level (nominally ±5.5V) transmitter 1 output.
7 T2OUT output ±15kV ESD protected, RS-232 level (nominally ±5.5V) transmitter 2 output.
8 T3OUT output ±15kV ESD protected, RS-232 level (nominally ±5.5V) transmitter 3 output.
9 NC unconnected No connection.
10 T3IN input TTL/CMOS compatible transmitter 3 input; the VL voltage sets the input switching point.
11 T2IN input TTL/CMOS compatible transmitter 2 input; the VL voltage sets the input switching point.
12 T1IN input TTL/CMOS compatible transmitter 1 input; the VL voltage sets the input switching point.
13 R5OUT output TTL/CMOS level receiver 5 output, swings between GND and VL.
14 R4OUT output TTL/CMOS level receiver 4 output, swings between GND and VL.
15 R3OUT output TTL/CMOS level receiver 3 output, swings between GND and VL.
16 NC unconnected No connection.
17 R2OUT output TTL/CMOS level receiver 2 output, swings between GND and VL.
18 R1OUT output TTL/CMOS level receiver 1 output, swings between GND and VL.
19 R2OUTB output TTL/CMOS level, noninverting, always enabled receiver output, swings between GND and VL.
20 INVALID output Active low output indicating no valid RS-232 levels are present on any receiver input; swings between GND and VL.
21 FORCEOFF input Active low input to shut down transmitters and on-chip power supply, overriding automatic circuitry and FORCEON; the VL voltage sets the input switching point.
22 FORCEON input Active high input to override automatic powerdown and keep transmitters active (FORCEOFF must be high); the VL voltage sets the input switching point.
23 C1- passive External voltage doubler capacitor connection.
24 GND power_in Ground connection, also the potential of the thermal pad.
25 VL power_in Logic power supply setting VOH of logic outputs and switching point of logic inputs; keep greater than 1.6V and less than or equal to VCC, and power up after VCC if not tied to it.
26 VCC power_in System power supply input (2.7V to 3.6V).
27 V+ power_out Internally generated positive transmitter supply (typically +5.5V).
28 C1+ passive External voltage doubler capacitor connection.
29 C2+ passive External voltage inverter capacitor connection.
30 C2- passive External voltage inverter capacitor connection.
31 V- power_out Internally generated negative transmitter supply (typically -5.5V).
32 NC unconnected No connection.
33 PAD power_in Exposed thermal pad; connect to GND.

Key specifications

Parameter Value
Manufacturer RENESAS
Package QFN-32-EP(5x5)
Category Interface ICs
Pins 33

CAD (KiCad official)

  • Symbol: ISL3243EIRZ-T
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: isl3243eirz-t-etched.step / isl3243eirz-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl3243eirz-t.step / isl3243eirz-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (16 pp, sha256 d050df620152f7e1, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF