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TLC0832IP
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLC0832IP
Texas Instruments · Analog To Digital Converters (ADC) · PDIP-8
TLC0832IP from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select, active low: a conversion starts when CS is taken low and CS must be held low for the complete conversion; a high level clears all internal registers and returns DO to high impedance, with CS high pulse duration of at least 220 ns. |
| 2 | CH0 | input | Multiplexed analog input channel 0 (IN+ when used differentially), compared to ground in single-ended mode, with the common-mode input range specified as -0.05 V to VCC+0.05 V. |
| 3 | CH1 | input | Multiplexed analog input channel 1 (IN- when used differentially), with the common-mode input range specified as -0.05 V to VCC+0.05 V, and the digital output code is 0000 0000 when IN- is more positive than IN+. |
| 4 | GND | power_in | Network ground terminal to which all voltages except differential voltages are referenced. |
| 5 | DI | input | Serial data input that shifts in the start bit and 2-bit multiplexer assignment word on each CLK rising edge, with data setup of 350 ns and hold of 90 ns before/after CLK↑; it is disabled for the duration of the conversion. |
| 6 | DO | tri_state | Serial data output that comes out of high impedance to provide a leading low during MUX settling, then outputs the conversion MSB first and, on the TLC0832, LSB-first data after the MSB-first stream, returning to high impedance when CS is high. |
| 7 | CLK | input | Serial clock input, specified for 10 kHz to 600 kHz with a 40% to 60% duty cycle (minimum pulse width 1 µs outside that duty-cycle range). |
| 8 | VCC/REF | power_in | Positive supply specified at 4.5 V to 5.5 V (nominal 5 V) that also serves as the reference input, which is internally tied to VCC on the TLC0832. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-8 |
| Category | Data Acquisition |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TLC0832IP - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
tlc0832ip-etched.step/tlc0832ip-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlc0832ip.step/tlc0832ip.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
0af85a1e9ea62978, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).