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Contents

README

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2EDL05N06PF-JSM

JSMSEMI · Gate Drivers · SOP-8

2EDL05N06PF-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low-side supply voltage, recommended 10 V to 20 V (absolute max 25 V) referenced to VSS.
2 HIN input High-side logic signal input, 0 V to VCC, compatible with 3.3 V/5 V/15 V logic.
3 LIN input Low-side logic signal input, 0 V to VCC, compatible with 3.3 V/5 V/15 V logic.
4 VSS power_in Ground reference for the logic and low-side supply.
5 LO output Low-side gate driver output, swings 0 V to VCC with 300 mA source/600 mA sink capability.
6 VS power_in High-side floating supply return, recommended -9 V to 700 V.
7 HO output High-side gate driver output, swings VS to VB with 300 mA source/600 mA sink capability.
8 VB power_in High-side floating supply, recommended VS+10 V to VS+20 V (absolute max 725 V).

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category Motor Driver ICs
Pins 8

CAD (KiCad official)

  • Symbol: 2EDL05N06PF-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: 2edl05n06pf-jsm-etched.step / 2edl05n06pf-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2edl05n06pf-jsm.step / 2edl05n06pf-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (7 pp, sha256 f4417f39c57b6b8a, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF