component

TLV320AIC29IRGZR

Public Made by Adom

by adom

Texas Instruments Audio Interface ICs, VQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfacetlv320aic29irgzrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

TLV320AIC29IRGZR

Texas Instruments · Audio Interface ICs · VQFN-48(7x7)

TLV320AIC29IRGZR from Texas Instruments, in a VQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IOVDD power_in IO supply for the digital interface; absolute maximum IOVDD to DVSS is -0.3 V to 3.9 V.
2 PWR_DN input Hardware power-down input for the device.
3 RESET input Hardware reset input for the device.
4 GPIO2 bidirectional General-purpose I/O; can also be used for headset detection interrupt or CLKOUT, per the register descriptions.
5 GPIO1 bidirectional General-purpose I/O; can also be used for button press detect interrupt or ADC word-select (ADWS), per the register descriptions.
6 AVDD2 power_in PLL analog power supply; absolute maximum AVDD1/2 to AVSS1/2 is -0.3 V to 3.9 V.
7 AVSS2 power_in Analog ground.
8 AVDD1 power_in Analog power supply for audio ADC, DAC, reference and SAR ADC; absolute maximum AVDD1/2 to AVSS1/2 is -0.3 V to 3.9 V.
9 NC unconnected No connect pin, listed as NC in the terminal functions table.
10 NC unconnected No connect pin, listed as NC in the terminal functions table.
11 NC unconnected No connect pin, listed as NC in the terminal functions table.
12 NC unconnected No connect pin, listed as NC in the terminal functions table.
13 AVSS1 power_in Analog ground.
14 VREF power_in Reference voltage for the SAR ADC; the internal reference (1.25 V or 2.5 V) can be used, or an external reference applied, per the operation section.
15 VBAT power_in Battery monitor input for direct battery measurement; input voltage limit to AVSS1/2 is -0.3 V to 6 V.
16 AUX2 input Secondary auxiliary analog input to the SAR ADC.
17 AUX1 input First auxiliary analog input to the SAR ADC.
18 BUZZ_IN/CP_INN input Buzzer input from the cell phone module, or inverting input from the cell phone module in differential mode.
19 CP_OUTP output Non-inverted output to the cell phone module.
20 CP_INP input Non-inverting input from the cell phone module.
21 MICIN_HND input Handset microphone input.
22 MICBIAS_HND power_out Handset microphone bias voltage output.
23 MICIN_HED input Headset microphone input.
24 MICBIAS_HED power_out Headset microphone bias voltage output.
25 MIC_DETECT_IN input Microphone detect input used for headset detection.
26 OUT32N output Receiver (32-ohm differential earpiece) driver output.
27 SPK1 output Headset driver output or receiver driver output.
28 SPK2 output Headset driver output.
29 DRVDD power_in Headphone driver power supply; absolute maximum DRVDD to DRVSS1/2 is -0.3 V to 3.9 V.
30 SPKFC input Driver feedback and speaker detect input.
31 VGND/CP_OUTN output Virtual ground for audio output, or inverted output to the cell phone module in differential mode.
32 DRVSS1 power_in Driver ground.
33 OUT8N output Loudspeaker driver output (negative side of BTL pair).
34 BVDD power_in Battery power supply for the speaker driver; absolute maximum BVDD to DRVSS1/2 is -0.3 V to 4.5 V.
35 OUT8P output Loudspeaker driver output (positive side of BTL pair).
36 DRVSS2 power_in Driver ground.
37 DAV output Auxiliary data available output.
38 SS input SPI slave select input.
39 MOSI input SPI serial data input.
40 MISO output SPI serial data output.
41 SCLK input SPI serial clock input.
42 MCLK input Master clock input.
43 SDOUT output Audio data output.
44 SDIN input Audio data input.
45 WCLK bidirectional Audio word clock; direction depends on master or slave mode.
46 BCLK bidirectional Audio bit clock; direction depends on master or slave mode.
47 DVDD power_in Digital core supply.
48 DVSS power_in Digital core and IO ground.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48(7x7)
Category Interface
Pins 49

CAD (KiCad official)

  • Symbol: TLV320AIC29IRGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: tlv320aic29irgzr-etched.step / tlv320aic29irgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv320aic29irgzr.step / tlv320aic29irgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (89 pp, sha256 bf0db08cb73fc5c7, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF