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Contents

README

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MC74VHC1G135DBVT1G

onsemi · Logic Gates · SC-74A-5

MC74VHC1G135DBVT1G from onsemi, in a SC-74A-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Input B of the 2-input Schmitt-trigger NAND gate; input structures are protected for voltages up to 5.5 V regardless of the supply voltage.
2 A input Input A of the 2-input Schmitt-trigger NAND gate; input structures are protected for voltages up to 5.5 V regardless of the supply voltage.
3 GND power_in Ground reference pin for the device.
4 Y output Open-drain NAND output; the datasheet rates the output source/sink current at 8 mA at 3.0 V and 25 mA absolute maximum.
5 VCC power_in Positive supply pin, specified for 2.0 V to 5.5 V operation.

Key specifications

Parameter Value
Manufacturer onsemi
Package SC-74A-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (SC-74A) VCC -0.5 6.5 V 3
DC Input Voltage (SC-74A) VIN -0.5 6.5 V 3
DC Output Voltage, Active-Mode (SC-74A) VOUT -0.5 V Active-Mode (High or Low State); printed max is VCC + 0.5 3
DC Output Voltage, Tri-State Mode (SC-74A) VOUT -0.5 6.5 V Tri-State Mode (Note 1) 3
DC Output Voltage, Power-Down Mode (SC-74A) VOUT -0.5 6.5 V Power-Down Mode (VCC = 0 V) 3
DC Input Diode Current IIK -20 mA VIN < GND 3
DC Output Diode Current IOK -20 mA VOUT < GND 3
DC Output Source/Sink Current IOUT 25 mA 3
DC Supply Current per Supply Pin or Ground Pin ICC or IGND 50 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Lead Temperature TL 260 °C 1 mm from case for 10 secs 3
Junction Temperature Under Bias TJ 150 °C 3
Thermal Resistance Junction-to-Ambient (SC-74A) θJA 320 °C/W Minimum pad spacing on FR4, 10 mm x 1 inch 2 oz trace, no air flow (Note 2) 3
Power Dissipation in Still Air (SC-74A) PD 390 mW Still air 3
ESD Withstand Voltage, Human Body Model VESD 2000 V Human Body Model (Note 3) 3
ESD Withstand Voltage, Charged Device Model VESD 1000 V Charged Device Model (Note 3) 3
Latchup Performance ILatchup 100 mA Tested to EIA/JESD78 Class II (Note 4) 3
Positive DC Supply Voltage VCC 2 5.5 V 4
DC Input Voltage VIN 0 5.5 V 4
DC Output Voltage, Active-Mode (SC-74A) VOUT 0 V Active-Mode (High or Low State); printed max is VCC 4
DC Output Voltage, Tri-State Mode (SC-74A) VOUT 0 5.5 V Tri-State Mode (Note 1) 4
DC Output Voltage, Power-Down Mode (SC-74A) VOUT 0 5.5 V Power-Down Mode (VCC = 0 V) 4
Operating Temperature Range TA -55 125 °C 4
Input Rise and Fall Time (SC-74A) tr, tf 0 20 ns/V VCC = 2.0 V 4
Input Rise and Fall Time (SC-74A) tr, tf 0 10 ns/V VCC = 3.0 V to 3.6 V 4
Input Rise and Fall Time (SC-74A) tr, tf 0 5 ns/V VCC = 4.5 V to 5.5 V 4
Positive Threshold Voltage VT+ 1.88 2.25 V VCC = 3.0 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Positive Threshold Voltage VT+ 2.66 3.1 V VCC = 4.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Positive Threshold Voltage VT+ 3.21 3.7 V VCC = 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Negative Threshold Voltage VT− 0.65 1.03 V VCC = 3.0 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Negative Threshold Voltage VT− 1.1 1.62 V VCC = 4.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Negative Threshold Voltage VT− 1.45 2.02 V VCC = 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Hysteresis Voltage VH 0.3 0.85 1.6 V VCC = 3.0 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Hysteresis Voltage VH 0.4 1.05 2 V VCC = 4.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Hysteresis Voltage VH 0.5 1.2 2.25 V VCC = 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Maximum Low-Level Output Voltage VOL 0 0.1 V VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 4
Maximum Low-Level Output Voltage VOL 0.52 V VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V; −55°C ≤ TA ≤ 125°C 4
Maximum Input Leakage Current IIN -1 1 µA VIN = 5.5 V or GND; VCC = 2.0 to 5.5 V; −55°C ≤ TA ≤ 125°C 4
Maximum Quiescent Supply Current ICC 40 µA VIN = VCC or GND; VCC = 5.5 V; −55°C ≤ TA ≤ 125°C 4
Power Off-Output Leakage Current IOFF 5 µA VOUT = 5.5 V; VIN = 5.5 V; VCC = 0 V; −55°C ≤ TA ≤ 125°C 4
Propagation Delay (A or B) to Y, tPZL tPZL 7.6 16.1 ns CL = 15 pF; VCC = 3.0 to 3.6 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPZL tPZL 10.1 19.6 ns CL = 50 pF; VCC = 3.0 to 3.6 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPZL tPZL 4.9 10.3 ns CL = 15 pF; VCC = 4.5 to 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPZL tPZL 6.4 12.3 ns CL = 50 pF; VCC = 4.5 to 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPLZ tPLZ 7.6 16.1 ns CL = 15 pF; VCC = 3.0 to 3.6 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPLZ tPLZ 10.1 19.6 ns CL = 50 pF; VCC = 3.0 to 3.6 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPLZ tPLZ 4.9 10.3 ns CL = 15 pF; VCC = 4.5 to 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Propagation Delay (A or B) to Y, tPLZ tPLZ 6.4 12.3 ns CL = 50 pF; VCC = 4.5 to 5.5 V; −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5
Maximum Input Capacitance CIN 5 10 pF −55°C ≤ TA ≤ 125°C (typ at TA = 25°C) 5

CAD (KiCad official)

  • Symbol: MC74VHC1G135DBVT1G
  • Footprint: Package_TO_SOT_SMD:SC-74A-5_1.55x2.9mm_P0.95mm
  • 3D model: SC-74A-5 (KiCad packages3D, STEP)
  • 3D model files: mc74vhc1g135dbvt1g-etched.step / mc74vhc1g135dbvt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhc1g135dbvt1g.step / mc74vhc1g135dbvt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (14 pp, sha256 071f4af7be5c14ad, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF