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UCC57142ADBVR
Public Made by Adomby adom
Texas Instruments , SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC57142ADBVR
Texas Instruments · IC · SOT-23-6
UCC57142ADBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OCP | input | Current sense input; when an overcurrent signal is detected the driver pulls EN/FLT low and forces OUT low (abs max -10 V to 12 V, recommended -5 V to 10 V). |
| 2 | COM | power_in | Device ground, the reference for all device voltages. |
| 3 | OUT | output | Output of the driver, typical 3 A sink and 3 A source peak current, ranging from COM to VDD. |
| 4 | VDD | power_in | Driver bias supply, absolute maximum 30 V and recommended 14.5 V to 26 V for the 12 V UVLO option (8.5 V to 26 V for the 8 V UVLO option). |
| 5 | EN/FLT | bidirectional | Enable input and fault report pin that needs an external pullup, is pulled low to report OCP, UVLO and over temperature faults, and disables the driver when pulled low (0 V to 26 V recommended). |
| 6 | IN | input | Input of the driver, DC voltage from -2 V to 26 V recommended (-5 V to 30 V absolute maximum). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD positive power supply | VDD | -0.3 | 30 | V | with respect to COM | 4 | |
| Voltage at current sense pin | VOCP | -10 | 12 | V | 4 | ||
| IN signal DC voltage | VIN | -5 | 30 | V | 4 | ||
| EN/FLT signal DC voltage | VEN/FLT | -0.3 | 30 | V | 4 | ||
| Junction temperature | TJ | -40 | 150 | ℃ | 4 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | Charged device model, JESD22-C101 | 4 | |
| Voltage at current sense pin | VOCP | -5 | 10 | V | 4 | ||
| IN signal DC voltage | VIN | -2 | 26 | V | 4 | ||
| EN signal DC voltage | VEN/FLT | 0 | 26 | V | 4 | ||
| Junction temperature | TJ | -40 | 150 | ℃ | 4 | ||
| VDD static supply current | IVDD | 0.7 | 1.5 | mA | VIN = 3.3 V, EN = 5 V | 5 | |
| VDD static supply current | IVDD | 0.7 | 1.1 | mA | VIN = 0 V, EN = 5 V | 5 | |
| VDD disable current | IDIS | 0.8 | 1.1 | mA | VIN = 3.3 V, EN = 0 V | 5 | |
| Input High Threshold Voltage | VINH | 1.8 | 2.2 | 2.6 | V | 5 | |
| Input Low Threshold Voltage | VINL | 0.8 | 1.2 | 1.6 | V | 5 | |
| Enable High Threshold Voltage | VENH | 1.8 | 2.2 | 2.6 | V | 5 | |
| Enable Low Threshold Voltage | VENL | 0.8 | 1.2 | 1.6 | V | 5 | |
| OC release threshold | VOCTL | -271 | -238 | -206 | mV | referenced to GND, -250 mV option | 5 |
| OC detection threshold | VOCTH | -265 | -250 | -235 | mV | referenced to GND, -250 mV option | 5 |
| Output Rise Time | tR | 8 | 18 | ns | CL=1.8 nF, 10% to 90%, Vin = 0 to 3.3 V | 6 | |
| Output Fall Time | tF | 14 | 32 | ns | CL=1.8 nF, 90% to 10%, Vin = 0 to 3.3 V | 6 | |
| Propagation Delay, Input falling to output falling | tD2 | 28 | 50 | ns | CL=1.8 nF, from 1 V falling on Vin to 90% of output fall, Vin=0 - 3.3 V, Fsw=500 kHz, 50% duty cycle | 6 | |
| Propagation Delay, Input rising to output rising | tD1 | 26 | 50 | ns | CL=1.8 nF, from 2 V rising on Vin to 10% of output rise, Vin=0 - 3.3 V, Fsw=500 kHz, 50% duty cycle | 6 | |
| DIS Response Delay | tPD_DIS | 27 | 45 | ns | CL=1.8 nF, from 1 V falling on EN to 90% of output fall, EN=0 - 3.3 V | 6 | |
| Pulse Width Distortion | tPWD | -10 | 10 | ns | Input Pulse Width = 100 ns, 500 kHz, /tD2_1, tD1_1/ | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 158.2 | °C/W | DBV, 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 78.7 | °C/W | DBV, 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 42.7 | °C/W | DBV, 6 pins | 4 | ||
| Junction-to-top characterization parameter | ΨJT | 18.8 | °C/W | DBV, 6 pins | 4 | ||
| Junction-to-board characterization parameter | ΨJB | 42.4 | °C/W | DBV, 6 pins | 4 | ||
| VDD dynamic operating current | IVDDO | 30 | mA | fSW = 1MHz, EN = 5 V, VDD=15 V, CL=1.8 nF | 5 | ||
| Input-threshold Hysteresis | VIN_HYS | 1 | V | 5 | |||
| IN Pin Pull Down Resistance | RIND | 115 | kΩ | 5 | |||
| Enable Threshold Hysteresis | VEN_HYS | 1 | V | 5 | |||
| EN Pin Pull Up Resistance | RENU | 2 | MΩ | 5 | |||
| FLT threshold | IFLTth | 18 | mA | VFLT-sink = 400 mV, Tj=25 °C | 5 | ||
| Overtemperature threshold | TSD | 180 | ℃ | 6 | |||
| Overtemperature protection hysteresis | THYS | 30 | ℃ | 6 | |||
| Propagation delay from overtemperature shutdown to FLT | tOTP2FLT | 8 | us | Over temperature shutdown to 90% of FLT, Cl=10 pF | 6 | ||
| Peak Output Source Current | ISRCPK | -3 | A | CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz | 6 | ||
| Peak Output Sink Current | ISNKPK | 3 | A | CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz | 6 | ||
| Pull up resistance | ROH | 5 | Ω | IOUT = -500 mA | 6 | ||
| Pull down resistance | ROL | 1 | Ω | IOUT = 50 mA | 6 |
CAD (KiCad official)
- Symbol:
UCC57142ADBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
ucc57142adbvr-etched.step/ucc57142adbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc57142adbvr.step/ucc57142adbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
9ac232958403d1dd, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).