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ADC3442IRTQT

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Texas Instruments Analog To Digital Converters (ADC), QFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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ADC3442IRTQT

Texas Instruments · Analog To Digital Converters (ADC) · QFN-56-EP(8x8)

ADC3442IRTQT from Texas Instruments, in a QFN-56-EP(8x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DA1P output Positive serial LVDS output for wire-1 of channel A.
2 DA1M output Negative serial LVDS output for wire-1 of channel A.
3 DA0P output Positive serial LVDS output for wire-0 of channel A.
4 DA0M output Negative serial LVDS output for wire-0 of channel A.
5 DVDD power_in Digital 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
6 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
7 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
8 INAM input Negative differential analog input for channel A.
9 INAP input Positive differential analog input for channel A.
10 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
11 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
12 INBP input Positive differential analog input for channel B.
13 INBM input Negative differential analog input for channel B.
14 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
15 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
16 SCLK input Serial interface clock input with an internal 150-kΩ pulldown resistor.
17 SDATA input Serial interface data input with an internal 150-kΩ pulldown resistor.
18 SEN input Serial interface enable, active low, with an internal 150-kΩ pullup resistor to AVDD.
19 SDOUT output Serial interface data output.
20 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
21 CLKM input Negative differential clock input for the ADC.
22 CLKP input Positive differential clock input for the ADC.
23 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
24 RESET input Hardware reset, active high, with an internal 150-kΩ pulldown resistor.
25 SYSREFP input Positive external SYSREF input.
26 SYSREFM input Negative external SYSREF input.
27 VCM output Common-mode voltage output for the analog inputs, 0.95 V typical, 10 mA output current capability.
28 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
29 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
30 INCM input Negative differential analog input for channel C.
31 INCP input Positive differential analog input for channel C.
32 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
33 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
34 INDP input Positive differential analog input for channel D.
35 INDM input Negative differential analog input for channel D.
36 AVDD power_in Analog 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
37 PDN input Power-down control, active high, configurable through the SPI, with an internal 150-kΩ pulldown resistor.
38 DVDD power_in Digital 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
39 DD1P output Positive serial LVDS output for wire-1 of channel D.
40 DD1M output Negative serial LVDS output for wire-1 of channel D.
41 DD0P output Positive serial LVDS output for wire-0 of channel D.
42 DD0M output Negative serial LVDS output for wire-0 of channel D.
43 DC1P output Positive serial LVDS output for wire-1 of channel C.
44 DC1M output Negative serial LVDS output for wire-1 of channel C.
45 DC0P output Positive serial LVDS output for wire-0 of channel C.
46 DC0M output Negative serial LVDS output for wire-0 of channel C.
47 DVDD power_in Digital 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
48 FCLKP output Positive frame clock output.
49 FCLKM output Negative frame clock output.
50 DCLKP output Positive bit clock output.
51 DCLKM output Negative bit clock output.
52 DVDD power_in Digital 1.8-V power supply (1.7 V to 1.9 V), decoupled with capacitors.
53 DB1P output Positive serial LVDS output for wire-1 of channel B.
54 DB1M output Negative serial LVDS output for wire-1 of channel B.
55 DB0P output Positive serial LVDS output for wire-0 of channel B.
56 DB0M output Negative serial LVDS output for wire-0 of channel B.
57 GND power_in Ground, 0 V; exposed PowerPAD on the back side to be connected to the PCB ground plane.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-56-EP(8x8)
Category Data Acquisition
Pins 57

CAD (KiCad official)

  • Symbol: ADC3442IRTQT
  • Footprint: Package_DFN_QFN:QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm
  • 3D model: QFN-56-EP(8x8) (KiCad packages3D, STEP)
  • 3D model files: adc3442irtqt-etched.step / adc3442irtqt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc3442irtqt.step / adc3442irtqt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (88 pp, sha256 919b6ef505ab3b32, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF