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Contents

README

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STD100N3LF3

STMicroelectronics · MOSFETs · DPAK

STD100N3LF3 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V with a gate threshold of 1 V min to 2.5 V max at ID = 250 µA.
2 D passive Drain (also the TAB); drain-source voltage 30 V max and 80 A continuous drain current at TC = 25 °C, limited by package.
3 S passive Source; source-drain diode current 80 A continuous and 320 A pulsed.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STD100N3LF3
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std100n3lf3-etched.step / std100n3lf3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std100n3lf3.step / std100n3lf3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (14 pp, sha256 aad9c77e7a6d0140, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF