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TPP362083-T6TR

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3PEAK(思瑞浦) DC-DC Converters, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tpp362083-t6trfactory-2.0.0extractor-text
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Contents

README

markdown

TPP362083-T6TR

3PEAK(思瑞浦) · DC-DC Converters · TSOT-23-6

TPP362083-T6TR from 3PEAK(思瑞浦), in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin for the power and controller circuits; use a star connection to the GND pin with good contact.
2 SW output Switching node pin that switches between the high-side and low-side FETs; SW voltage is limited to −0.3 V to VIN + 0.3 V (−3 V for 50 ns, −5 V for 20 ns transients).
3 VIN power_in Supply input pin with a 4.5 V to 36 V operating range; connect 2 × 10 µF and 1 × 0.1 µF decoupling capacitors between VIN and GND.
4 VFB input Voltage feedback pin, connected to the output voltage through a feedback resistor divider; FB input voltage range is 0 V to 5.5 V.
5 EN input Active-high enable input with an internal weak pull-up; EN input voltage range is 0 V to 36 V.
6 VBST output High-side MOSFET gate supply pin; connect a 0.1 µF capacitor between VBST and SW, with BOOT-SW voltage range 0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer 3PEAK(思瑞浦)
Package TSOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Supply Voltage VIN -0.3 42 V 5
SW Switching Node Voltage SW -0.3 V 5
Switching Node Voltage (50 ns) -3 42 V 50 ns 5
Switching Node Voltage (20 ns) -5 42 V 20 ns 5
VBST-SW Bootstrap Voltage VBST-SW -0.3 6 V 5
FB Feedback Voltage FB -0.3 6 V 5
EN Enable Input EN -0.3 42 V 5
TJ Maximum Junction Temperature TJ -40 150 °C 5
TA Operating Temperature Range TA -40 125 °C 5
TSTG Storage Temperature Range TSTG -65 150 °C 5
TL Lead Temperature (Soldering) TL 260 °C Soldering 10 sec 5
VIN Supply Input Voltage Range VIN 4.5 36 V 6
EN Input Voltage Range EN 0 36 V 6
FB Input Voltage Range FB 0 5.5 V 6
BOOT Voltage Range BOOT, SW 0 5.5 V 6
SW FB Input Voltage Range SW 0 V 6
TJ Operating Junction Temperature TJ -40 150 °C 6
VIN Supply Voltage Range VIN 4.5 36 V 7
UVLO Rising Threshold VUVLO_rising 3.9 4.3 4.5 V 7
UVLO Falling Threshold VUVLO_falling 3.7 3.9 4.1 V 7
EN Input Rising Threshold VENH 1.15 1.28 1.35 V 7
EN Input Falling Threshold VENL 1 1.15 1.2 V 7
EN current, EN = L IEN_L 0.65 1.04 1.5 μA EN = L(1), VEN = 0.9 V 7
EN current, EN = H IEN_H 3.6 4.3 5.2 μA EN = H, VEN = 1.5 V 7
VFB Feedback Voltage VFB 588 600 612 mV 7
Switching Frequency (TPP362081/3) fSW 1.76 2.2 2.64 MHz 7
Soft start transition time t ss_done 14 18 24 ms 7
High-side Current Limit ILimit_HS 2.5 3.2 3.9 A Inductor peak current 7
Operating Supply Current IQ 70 μA Non-switching, EN = 5 V, VFB = 1 V 7
Shut Down Supply Current IQSD 2 μA EN = GND 7
EN hysteresis current IEN_HYS 3.3 μA VEN = 1.5 V 7
High-side FET On-Resistance Rds(on)_HSD 180 mΩ ISW = 1 A 7
Low-side FET On-Resistance Rds(on)_LSD 90 mΩ ISW = 1 A 7
Soft-Start Time tss 2 ms 7
Low-side Current Limit ILimit_LS 2.5 A Inductor valley current 7
Negative Low-side Current Limit ILimit_LS_neg 0.9 A 7
FB Hiccup Protection Rising Ratio VFB_UVP_rising 33 % 7
FB Hiccup Protection Falling Ratio VFB_UVP_falling 40 % 7
FB Over-Voltage Protection Rising Ratio VFB_OVP_rising 108 % 7
FB Over-Voltage Protection Falling Ratio VFB_OVP_falling 107 % 7
Hiccup Protection Wait Time tHIC_wait 128 Cycles 8
Hiccup Protection Restart Time tHIC_restart 60 ms 8
Thermal Shut Down Temperature TSD 160 °C 8
Thermal Hysteresis TSD_hys 10 °C 8
Thermal resistance junction-to-ambient, TSOT23-6 θJA 100 °C/W 6
Thermal resistance junction-to-case, TSOT23-6 θJC 67 °C/W 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • It is recommended to bypass the input pin to ground with a 0.1-μF bypass capacitor. • It is recommended to use wide and thick copper to minimize I×R drop and heat dissipation. 19

CAD (KiCad official)

  • Symbol: TPP362083-T6TR
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tpp362083-t6tr-etched.step / tpp362083-t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpp362083-t6tr.step / tpp362083-t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK(思瑞浦) datasheet (24 pp, sha256 c9d02d35fd060cea, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF