component
L9012QLT1G
Public Made by Adomby adom
LRC Bipolar Transistors - BJT, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownL9012QLT1G
LRC · Bipolar Transistors - BJT · SOT-23
L9012QLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | input | Base terminal of the PNP transistor, which controls collector current; for the Q suffix the DC current gain is hFE 150 to 300 at IC=-50 mA and VCE=-1 V. |
| 2 | EMITTER | passive | Emitter terminal of the PNP transistor; the datasheet lists the emitter cutoff current IEBO as -150 nA maximum at VBE=-4 V. |
| 3 | COLLECTOR | passive | Collector terminal of the PNP transistor, rated for VCEO -20 V, VCBO -40 V and continuous collector current IC -500 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Emitter Voltage | VCEO | -20 | V | 1 | |||
| Collector-Base Voltage | VCBO | -40 | V | 1 | |||
| Emitter-Base Voltage | VEBO | -5 | V | 1 | |||
| Collector Current - Continuous | IC | -500 | mAdc | 1 | |||
| Total Device Dissipation (FR-5 Board) | PD | 225 | mW | FR-5 Board, TA=25°C | 1 | ||
| Derate above 25°C (FR-5 Board) | 1.8 | mW/°C | FR-5 Board, derate above TA=25°C | 1 | |||
| Total Device Dissipation (Alumina Substrate) | PD | 300 | mW | Alumina Substrate, TA=25°C | 1 | ||
| Derate above 25°C (Alumina Substrate) | 2.4 | mW/°C | Alumina Substrate, derate above TA=25°C | 1 | |||
| Thermal Resistance, Junction to Ambient (FR-5 Board) | RθJA | 556 | °C/W | FR-5 Board | 1 | ||
| Thermal Resistance, Junction to Ambient (Alumina Substrate) | RθJA | 417 | °C/W | Alumina Substrate | 1 | ||
| Junction and Storage Temperature | Tj, Tstg | -55 | 150 | °C | 1 | ||
| Collector-Emitter Breakdown Voltage | V(BR)CEO | -20 | V | IC=-1.0mA | 1 | ||
| Emitter-Base Breakdown Voltage | V(BR)EBO | -5 | V | IE=-100µA | 1 | ||
| Collector-Base Breakdown Voltage | V(BR)CBO | -40 | V | IC=-100µA | 1 | ||
| Collector Cutoff Current | ICBO | -150 | nA | VCB=-35V | 1 | ||
| Emitter Cutoff Current | IEBO | -150 | nA | VBE=-4V | 1 | ||
| DC Current Gain (Grade Q) | hFE | 150 | 300 | IC=-50mA, VCE=-1V | 2 | ||
| Collector-Emitter Saturation Voltage | VCE(sat) | -0.6 | V | IC=-500mA, IB=-50mA | 2 |
CAD (KiCad official)
- Symbol:
L9012QLT1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
l9012qlt1g-etched.step/l9012qlt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l9012qlt1g.step/l9012qlt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (2 pp, sha256
c963d04ab5fcda21, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).