Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CA-IS3082CWX

Chipanalog · Isolated RS-485/422 Transceivers · SOIC-16-300mil

CA-IS3082CWX from Chipanalog, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDA power_in Logic side power supply input; connect 0.1μF and 1μF bypass capacitors between VDDA and GNDA pins as close as possible to device pins.
2 GNDA power_in Logic side ground, providing ground reference for digital signals.
3 RO output Receiver data output; when RE is low (receiver enabled), outputs high if (VA - VB) ≥ -50mV or low if (VA - VB) ≤ -200mV; outputs high impedance when RE is high.
4 RE input Receiver enable control input with internal weak pull-up; low level enables receiver, high level disables receiver output.
5 DE input Driver enable control input with internal weak pull-down, high level active; low level inhibits data transmission and sets driver output to high impedance.
6 DI input Driver data input with internal weak pull-up; when DE is high, high level on DI produces high on A and low on B; low level produces opposite result.
7 GNDA power_in Logic side ground, providing ground reference for digital signals.
8 GNDA power_in Logic side ground, providing ground reference for digital signals.
9 GNDB power_in Bus side ground, providing ground reference for RS-485 bus signals.
10 GNDB power_in Bus side ground, providing ground reference for RS-485 bus signals.
11 NC unconnected No internal connection; can be connected to VDDB, GNDB, or left floating.
12 A bidirectional RS-485 bus in-phase output from driver / in-phase input to receiver; differential pair with pin 13; operates as driver output when DE=high, receiver input when RE=low.
13 B bidirectional RS-485 bus anti-phase output from driver / anti-phase input to receiver; differential pair with pin 12; operates as driver output when DE=high, receiver input when RE=low.
14 NC unconnected No internal connection; can be connected to VDDB, GNDB, or left floating.
15 GNDB power_in Bus side ground, providing ground reference for RS-485 bus signals.
16 VDDB power_in Bus side power supply input; connect 0.1μF and 1μF bypass capacitors between VDDB and GNDB pins as close as possible to device pins.

Key specifications

Parameter Value
Manufacturer Chipanalog
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

CAD (KiCad official)

  • Symbol: CA-IS3082CWX
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ca-is3082cwx-etched.step / ca-is3082cwx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca-is3082cwx.step / ca-is3082cwx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Chipanalog datasheet (22 pp, sha256 9eab96b1cb24d97f, retrieved 2026-09-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF