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MPQ2029GN-AEC1-Z
Public Made by Adomby adom
Monolithic Power Systems Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMPQ2029GN-AEC1-Z
Monolithic Power Systems · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP
MPQ2029GN-AEC1-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage, adjustable from 1.25V to 15V, and requires a low-value ceramic output capacitor (≥0.47µF) for stability. |
| 2 | NC | unconnected | No connection. |
| 3 | GND | power_in | Ground; connect the exposed pad and GND to the same ground plane. |
| 4 | IN | power_in | Input voltage; connect a 3V to 40V supply to IN. |
| 5 | EN | input | Regulator on/off control: pull below 0.3V to shut the IC down and above 1.8V to start it up, and connect to IN for automatic start-up. |
| 6 | PG | output | Power-good output; the datasheet gives only its electrical limits, with a rising threshold of 89% to 97% of VFB, a low-level output of 0.4V max when sinking 1mA, and 1µA maximum leakage at VPG = 5V. |
| 7 | PGDL | passive | Programmable power-good delay pin, where an external capacitor (47nF example) sets the delay with a 3µA to 9µA charging current at VPGDL = 1V and rising/falling thresholds of 1.4V to 2V and 0.2V to 0.7V. |
| 8 | FB | input | Feedback input for the adjustable output, regulated to 1.25V nominal, and used with an external resistor divider to set VOUT. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (IN, EN) absolute maximum | -0.3 | 42 | V | 3 | |||
| OUT absolute maximum voltage | -0.3 | 17 | V | 3 | |||
| PG absolute maximum voltage | -0.3 | 15 | V | 3 | |||
| PGDL, FB absolute maximum voltage | -0.3 | 6 | V | 3 | |||
| Junction temperature absolute maximum | 150 | C | 3 | ||||
| Lead temperature absolute maximum | 260 | C | 3 | ||||
| Storage temperature | -65 | 150 | C | 3 | |||
| Continuous power dissipation SOIC8 EP | 2.5 | W | TA = +25°C | 3 | |||
| ESD human body model (HBM) | 4 | kV | 3 | ||||
| ESD machine model (MM) | 200 | V | 3 | ||||
| Supply voltage (VIN) recommended | VIN | 3 | 40 | V | 3 | ||
| Output voltage (VOUT) recommended | VOUT | 1.25 | 15 | V | 3 | ||
| Operating temperature | TA | -40 | 125 | C | TA ≤ TJ ≤ +150°C | 3 | |
| Thermal resistance junction-to-ambient SOIC8 EP | θJA | 50 | °C/W | Measured on JESD51-7, 4-layer PCB | 3 | ||
| Thermal resistance junction-to-case SOIC8 EP | θJC | 10 | °C/W | 3 | |||
| Input voltage | VIN | 3 | 40 | V | 4 | ||
| Output voltage range | VOUT | 1.25 | 15 | V | 4 | ||
| GND current | IGND | 10 | 15 | µA | 0 < ILOAD < 1mA | 4 | |
| GND current | IGND | 15 | 21 | µA | 1mA < ILOAD < 30mA | 4 | |
| GND current | IGND | 65 | 95 | µA | 30mA < ILOAD < 300mA | 4 | |
| Load current limit | ILIMIT | 600 | 1000 | 1350 | mA | VIN = 7V, VOUT = 0V, TJ = +25°C | 4 |
| FB voltage | VFB | 1.225 | 1.25 | 1.275 | V | FB = OUT, ILOAD = 5mA | 4 |
| Output voltage accuracy | 9.4 | 10 | 10.4 | V | ILOAD = 5mA, VOUT = 10V | 4 | |
| Dropout voltage | VDROPOUT | 200 | 400 | mV | VOUT = 10V, ILOAD = 150mA | 4 | |
| Dropout voltage | VDROPOUT | 1300 | mV | TJ = +25°C, VOUT = 10V, ILOAD = 450mA | 4 | ||
| Line regulation | -10 | 1 | 10 | mV | VIN = 3V to 40V, ILOAD = 5mA, VOUT = VFB | 4 | |
| Load regulation | 30 | 60 | mV | ILOAD = 5mA to 450mA, VOUT = 10V, TJ = +25°C | 4 | ||
| Start-up response time | 1.9 | 2.5 | ms | RLOAD = 500Ω, VOUT = 10V, COUT = 22µF, VOUT from 10% to 90% | 4 | ||
| EN input current | 0.1 | 0.5 | µA | EN = 0V or 15V | 4 | ||
| PG rising threshold | 89 | 93 | 97 | % VFB | 4 | ||
| PG low voltage | 0.1 | 0.4 | V | Sink 1mA current | 4 | ||
| PGDL charging current | 3 | 5.5 | 9 | µA | VPGDL = 1V | 4 | |
| PGDL rising threshold | 1.4 | 1.7 | 2 | V | 4 | ||
| PGDL falling threshold | 0.2 | 0.4 | 0.7 | V | 4 | ||
| PG delay time | 5 | 10 | 15 | ms | CPGDL = 47nF | 4 | |
| PG reaction time | 0.5 | 2 | µs | CPGDL = 47nF | 4 | ||
| EN logic low threshold | VIL | 0.3 | V | 4 | |||
| EN logic high threshold | VIH | 1.8 | V | 4 | |||
| Shutdown supply current | IS | 1 | µA | VEN = 0V | 4 | ||
| FB input current | IFB | 50 | nA | VFB = 1.3V | 4 | ||
| Output voltage PSRR | 57 | dB | 100Hz, COUT = 10μF, ILOAD = 10mA | 4 | |||
| Output voltage PSRR | 45 | dB | 1kHz, COUT = 10μF, ILOAD = 10mA | 4 | |||
| Output voltage PSRR | 51 | dB | 100kHz, COUT = 10μF, ILOAD = 10mA | 4 | |||
| PG rising threshold hysteresis | 5 | % VFB | 4 | ||||
| PG leakage current | 1 | µA | VPG = 5V | 4 | |||
| Thermal shutdown | TSD | 150 | C | 4 | |||
| Thermal shutdown hysteresis | ΔTSD | 30 | C | 4 |
CAD (KiCad official)
- Symbol:
MPQ2029GN-AEC1-Z - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
mpq2029gn-aec1-z-etched.step/mpq2029gn-aec1-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mpq2029gn-aec1-z.step/mpq2029gn-aec1-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (15 pp, sha256
4e0085947afc485c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).