component
TC7SH02FU
Public Made by Adomby adom
TOSHIBA Gates, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC7SH02FU
TOSHIBA · Gates · SOT-353
TC7SH02FU from TOSHIBA, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN B | input | Gate input B of the 2-input NOR gate; 5.5 V tolerant input (0 to 5.5 V), unused inputs must be tied to VCC or GND. |
| 2 | IN A | input | Gate input A of the 2-input NOR gate; 5.5 V tolerant input (0 to 5.5 V), unused inputs must be tied to VCC or GND. |
| 3 | GND | power_in | Ground pin (0 V reference). |
| 4 | OUT Y | output | NOR gate output Y, high only when both inputs are low; output voltage range 0 to VCC with up to ±8 mA drive at 4.5 V. |
| 5 | VCC | power_in | Positive supply pin, operating range 2.0 to 5.5 V (absolute maximum -0.5 to 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOT-353 |
| Category | Logic ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Low-level input voltage | VIL | 0.5 | V | VCC=2.0 V, Ta=25 °C | 3 | ||
| High-level input voltage | VIH | 1.5 | V | VCC=2.0 V, Ta=25 °C | 3 | ||
| High-level output voltage | VOH | 1.9 | 2 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=2.0 V, Ta=25 °C | 3 | |
| High-level output voltage | VOH | 2.9 | 3 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=3.0 V, Ta=25 °C | 3 | |
| High-level output voltage | VOH | 4.4 | 4.5 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=4.5 V, Ta=25 °C | 3 | |
| High-level output voltage | VOH | 2.58 | V | VIN=VIH or VIL, IOH=-4 mA, VCC=3.0 V, Ta=25 °C | 3 | ||
| High-level output voltage | VOH | 3.94 | V | VIN=VIH or VIL, IOH=-8 mA, VCC=4.5 V, Ta=25 °C | 3 | ||
| Low-level output voltage | VOL | 0 | 0.1 | V | VIN=VIH or VIL, IOL=50 µA, VCC=2.0 V, Ta=25 °C | 3 | |
| Low-level output voltage | VOL | 0.36 | V | VIN=VIH or VIL, IOL=4 mA, VCC=3.0 V, Ta=25 °C | 3 | ||
| Input leakage current | IIN | -0.1 | 0.1 | µA | VIN=5.5 V or GND, VCC=0 to 5.5 V, Ta=25 °C | 3 | |
| Quiescent supply current | ICC | 2 | µA | VIN=VCC or GND, VCC=5.5 V, Ta=25 °C | 3 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC=2.0 V, Ta=-40 to 85 °C | 4 | ||
| High-level input voltage | VIH | 1.5 | V | VCC=2.0 V, Ta=-40 to 85 °C | 4 | ||
| High-level output voltage | VOH | 1.9 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=2.0 V, Ta=-40 to 85 °C | 4 | ||
| High-level output voltage | VOH | 2.9 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=3.0 V, Ta=-40 to 85 °C | 4 | ||
| High-level output voltage | VOH | 4.4 | V | VIN=VIH or VIL, IOH=-50 µA, VCC=4.5 V, Ta=-40 to 85 °C | 4 | ||
| High-level output voltage | VOH | 2.48 | V | VIN=VIH or VIL, IOH=-4 mA, VCC=3.0 V, Ta=-40 to 85 °C | 4 | ||
| High-level output voltage | VOH | 3.8 | V | VIN=VIH or VIL, IOH=-8 mA, VCC=4.5 V, Ta=-40 to 85 °C | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | VIN=VIH or VIL, IOL=50 µA, VCC=2.0 V, Ta=-40 to 85 °C | 4 | ||
| Low-level output voltage | VOL | 0.44 | V | VIN=VIH or VIL, IOL=4 mA, VCC=3.0 V, Ta=-40 to 85 °C | 4 | ||
| Input leakage current | IIN | -1 | 1 | µA | VIN=5.5 V or GND, VCC=0 to 5.5 V, Ta=-40 to 85 °C | 4 | |
| Quiescent supply current | ICC | 20 | µA | VIN=VCC or GND, VCC=5.5 V, Ta=-40 to 85 °C | 4 | ||
| Propagation delay time | tPLH,tPHL | 5.6 | 7.9 | ns | VCC=3.3±0.3 V, CL=15 pF, Ta=25 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 8.1 | 11.4 | ns | VCC=3.3±0.3 V, CL=50 pF, Ta=25 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 3.6 | 5.5 | ns | VCC=5.0±0.5 V, CL=15 pF, Ta=25 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 5.14 | 7.5 | ns | VCC=5.0±0.5 V, CL=50 pF, Ta=25 °C | 5 | |
| Input capacitance | CIN | 10 | pF | Ta=25 °C | 5 | ||
| Power dissipation capacitance | CPD | 15 | pF | Ta=25 °C | 5 | ||
| Propagation delay time | tPLH,tPHL | 1 | 9.5 | ns | VCC=3.3±0.3 V, CL=15 pF, Ta=-40 to 85 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 1 | 13 | ns | VCC=3.3±0.3 V, CL=50 pF, Ta=-40 to 85 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 1 | 6.5 | ns | VCC=5.0±0.5 V, CL=15 pF, Ta=-40 to 85 °C | 5 | |
| Propagation delay time | tPLH,tPHL | 1 | 8.5 | ns | VCC=5.0±0.5 V, CL=50 pF, Ta=-40 to 85 °C | 5 | |
| Supply voltage | VCC | -0.5 | 7 | V | Ta=25 °C | 2 | |
| Input voltage | VIN | -0.5 | 7 | V | Ta=25 °C | 2 | |
| DC output voltage | VOUT | -0.5 | V | Printed as -0.5 to VCC + 0.5; Ta=25 °C | 2 | ||
| Input diode current | IIK | -20 | mA | Ta=25 °C | 2 | ||
| Output diode current | IOK | -20 | 20 | mA | VOUT < GND, VOUT > VCC | 2 | |
| DC output current | IOUT | -25 | 25 | mA | Ta=25 °C | 2 | |
| VCC/ground current | ICC | -50 | 50 | mA | Ta=25 °C | 2 | |
| Power dissipation | PD | 200 | mW | Ta=25 °C | 2 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 2 | ||
| Supply voltage | VCC | 2 | 5.5 | V | 3 | ||
| Input voltage | VIN | 0 | 5.5 | V | 3 | ||
| Output voltage | VOUT | 0 | V | Printed as 0 to VCC | 3 | ||
| Operating temperature | Topr | -40 | 85 | °C | Devices not ending in J(CT | 3 | |
| Input rise and fall time | dt/dv | 0 | 100 | ns/V | VCC = 3.3 ± 0.3 V | 3 | |
| Input rise and fall time | dt/dv | 0 | 20 | ns/V | VCC = 5.0 ± 0.5 V | 3 |
CAD (KiCad official)
- Symbol:
TC7SH02FU - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files:
tc7sh02fu-etched.step/tc7sh02fu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc7sh02fu.step/tc7sh02fu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (7 pp, sha256
01c543900c6a241d, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).