component
PIC16F57-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownPIC16F57-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-28-300mil
PIC16F57-I from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | T0CKI | input | Schmitt Trigger clock input to Timer0; must be tied to VSS or VDD if not in use to reduce current consumption. |
| 2 | VDD | power_in | Positive supply for logic and I/O pins, 2.0V to 5.5V operating range. |
| 3 | N/C | unconnected | Unused, do not connect. |
| 4 | VSS | power_in | Ground reference for logic and I/O pins. |
| 5 | N/C | unconnected | Unused, do not connect. |
| 6 | RA0 | bidirectional | PORTA bidirectional I/O pin with TTL input and CMOS output. |
| 7 | RA1 | bidirectional | PORTA bidirectional I/O pin with TTL input and CMOS output. |
| 8 | RA2 | bidirectional | PORTA bidirectional I/O pin with TTL input and CMOS output. |
| 9 | RA3 | bidirectional | PORTA bidirectional I/O pin with TTL input and CMOS output. |
| 10 | RB0 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 11 | RB1 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 12 | RB2 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 13 | RB3 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 14 | RB4 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 15 | RB5 | bidirectional | PORTB bidirectional I/O pin with TTL input and CMOS output. |
| 16 | RB6/ICSPCLK | bidirectional | PORTB bidirectional I/O pin that also serves as the Schmitt Trigger serial programming clock input. |
| 17 | RB7/ICSPDAT | bidirectional | PORTB bidirectional I/O pin that also serves as the serial programming data I/O (Schmitt Trigger input, CMOS output). |
| 18 | RC0 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 19 | RC1 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 20 | RC2 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 21 | RC3 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 22 | RC4 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 23 | RC5 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 24 | RC6 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 25 | RC7 | bidirectional | PORTC bidirectional I/O pin with TTL input and CMOS output. |
| 26 | OSC2/CLKOUT | output | Oscillator crystal output connecting to crystal or resonator; in RC mode outputs CLKOUT at 1/4 the frequency of OSC1. |
| 27 | OSC1/CLKIN | input | Oscillator crystal input or external clock source input (Schmitt Trigger). |
| 28 | MCLR/VPP | input | Active-low Reset input and programming voltage input; voltage must not exceed VDD to avoid unintended entry into Programming mode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VDD) | VDD | 2 | 5.5 | V | 62 | ||
| Operating Temperature (TA) | TA | -40 | 85 | °C | industrial | 62 | |
| VDD Rise Rate to ensure Power-on Reset | SVDD | 0.05 | V/ms | 62 | |||
| Supply Current (IDD) | IDD | 170 | 350 | μA | FOSC = 4 MHz, VDD = 2.0V, XT or RC mode | 62 | |
| Supply Current (IDD) | IDD | 0.4 | 1 | mA | FOSC = 10 MHz, VDD = 3.0V, HS mode | 62 | |
| Supply Current (IDD) | IDD | 1.7 | 5 | mA | FOSC = 20 MHz, VDD = 5.0V, HS mode | 62 | |
| Supply Current (IDD) | IDD | 15 | 22.5 | μA | FOSC = 32 kHz, VDD = 2.0V, LP mode, WDT disabled | 62 | |
| Power-down Current (IPD) | IPD | 1 | 6 | μA | VDD = 2.0V, WDT enabled | 62 | |
| Power-down Current (IPD) | IPD | 0.5 | 2.5 | μA | VDD = 2.0V, WDT disabled | 62 | |
| Input Low Voltage, I/O ports | VIL | 0.8 | V | 4.5V < VDD ≤ 5.5V | 64 | ||
| Input High Voltage, I/O ports | VIH | 2 | V | 4.5V < VDD ≤ 5.5V | 64 | ||
| Input Leakage Current, I/O ports | IIL | -1 | 1 | μA | VSS ≤ VPIN ≤ VDD, pin at high-impedance | 64 | |
| Input Leakage Current, MCLR | IIL | -5 | 5 | μA | VSS ≤ VPIN ≤ VDD | 64 | |
| Input Leakage Current, T0CKI | IIL | -5 | 5 | μA | VSS ≤ VPIN ≤ VDD | 64 | |
| Input Leakage Current, OSC1 | IIL | -5 | 5 | μA | VSS ≤ VPIN ≤ VDD, XT, HS and LP modes | 64 | |
| Output Low Voltage, I/O ports | VOL | 0.6 | V | IOL = 8.5 mA, VDD = 4.5V | 64 | ||
| Output Low Voltage, OSC2/CLKOUT (RC mode) | VOL | 0.6 | V | IOL = 1.6 mA, VDD = 4.5V | 64 | ||
| External CLKIN Frequency, XT Osc mode | FOSC | 4 | MHz | XT Osc mode | 66 | ||
| External CLKIN Frequency, HS Osc mode | FOSC | 20 | MHz | HS Osc mode | 66 | ||
| External CLKIN Frequency, LP Osc mode | FOSC | 200 | kHz | LP Osc mode | 66 | ||
| Oscillator Frequency, RC Osc mode | FOSC | 4 | MHz | RC Osc mode | 66 | ||
| Oscillator Frequency, XT Osc mode | FOSC | 0.1 | 4 | MHz | XT Osc mode | 66 | |
| Oscillator Frequency, HS Osc mode | FOSC | 4 | 20 | MHz | HS Osc mode | 66 | |
| Oscillator Frequency, LP Osc mode | FOSC | 5 | 200 | kHz | LP Osc mode | 66 | |
| External CLKIN Period, XT Osc mode | TOSC | 250 | ns | XT Osc mode | 66 | ||
| External CLKIN Period, HS Osc mode | TOSC | 50 | ns | HS Osc mode | 66 | ||
| External CLKIN Period, LP Osc mode | TOSC | 5 | μs | LP Osc mode | 66 | ||
| Oscillator Period, RC Osc mode | TOSC | 250 | ns | RC Osc mode | 66 | ||
| Oscillator Period, XT Osc mode | TOSC | 250 | 10000 | ns | XT Osc mode | 66 | |
| Oscillator Period, HS Osc mode | TOSC | 50 | 250 | ns | HS Osc mode | 66 | |
| Oscillator Period, LP Osc mode | TOSC | 5 | μs | LP oscillator | 66 | ||
| Clock in (OSC1) Low or High Time, XT oscillator | TosL, TosH | 50 | ns | XT oscillator | 66 | ||
| Clock in (OSC1) Low or High Time, HS oscillator | TosL, TosH | 20 | ns | HS oscillator | 66 | ||
| Clock in (OSC1) Low or High Time, LP oscillator | TosL, TosH | 2 | μs | LP oscillator | 66 | ||
| OSC1↑ to CLKOUT↓ | TosH2CKL | 15 | 30 | ns | 67 | ||
| OSC1↑ to CLKOUT↑ | TosH2CKH | 15 | 30 | ns | 67 | ||
| OSC1↑ (Q1 cycle) to Port out valid | TOSH2IOV | 100 | ns | 67 | |||
| Port output rise time, PIC16F54/57 | TIOR | 10 | 25 | ns | PIC16F54/57 only | 67 | |
| Port output fall time, PIC16F54/57 | TIOF | 10 | 25 | ns | PIC16F54/57 only | 67 | |
| MCLR Pulse Width (low) | TMCL | 2000 | ns | VDD = 5.0V | 68 | ||
| Watchdog Timer Time-out Period (No Prescaler) | TWDT | 9 | 18 | 30 | ms | VDD = 5.0V (industrial) | 68 |
| Device Reset Timer Period | TDRT | 9 | 18 | 30 | ms | VDD = 5.0V (industrial) | 68 |
| I/O high-impedance from MCLR Low | TIOZ | 100 | 300 | 2000 | ns | 68 | |
| T0CKI High Pulse Width | Tt0H | 10 | ns | With Prescaler | 69 | ||
| T0CKI Low Pulse Width | Tt0L | 10 | ns | With Prescaler | 69 | ||
| Ambient Temperature under bias | -40 | 125 | °C | 59 | |||
| Storage Temperature | -65 | 150 | °C | 59 | |||
| Voltage on VDD with respect to VSS | VDD | 0 | 6.5 | V | 59 | ||
| Voltage on MCLR with respect to VSS | 0 | 13.5 | V | 59 | |||
| Voltage on all other pins with respect to VSS (max VDD + 0.6V) | -0.6 | V | 59 | ||||
| Max. current out of VSS pin | 150 | mA | 59 | ||||
| Max. current into VDD pin | 100 | mA | 59 | ||||
| Max. current into an input pin (T0CKI only) | -500 | 500 | μA | 59 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VDD | 59 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 59 | |
| Max. output current sourced by a single I/O port (PORTA, B or C) | 50 | mA | 59 | ||||
| Max. output current sunk by a single I/O port (PORTA, B or C) | 50 | mA | 59 |
CAD (KiCad official)
- Symbol:
PIC16F57-I - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
pic16f57-i-etched.step/pic16f57-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f57-i.step/pic16f57-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
9bbebc365e114e33, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).