74HC595N from HGSEMI, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	QB	tri_state	Parallel data output bit B (one of QA~QH 8-bit parallel outputs). Tri-state; driven when output-enable G is low, high-Z when G is high.
2	QC	tri_state	Parallel data output bit C. Tri-state output controlled by G (pin 13).
3	QD	tri_state	Parallel data output bit D. Tri-state output controlled by G (pin 13).
4	QE	tri_state	Parallel data output bit E. Tri-state output controlled by G (pin 13).
5	QF	tri_state	Parallel data output bit F. Tri-state output controlled by G (pin 13).
6	QG	tri_state	Parallel data output bit G. Tri-state output controlled by G (pin 13).
7	QH	tri_state	Parallel data output bit H (last of the 8 latched parallel outputs). Tri-state output controlled by G (pin 13).
8	GND	power_in	Ground / 0 V reference (电源地).
9	Q'H	output	Serial data output from the shift register. Used to cascade the serial data to the next 74HC595 (串行数据输出管脚). Not tri-stated; always driven.
10	SCLR	input	Active-low shift-register clear (asynchronous reset). Drive low to clear the 8-bit shift register (移位寄存器清零端); must be high for normal shift operation.
11	SCK	input	Shift-register clock input (数据输入时钟端). On the rising edge, data on SER is shifted into the internal 8-bit shift register.
12	RCK	input	Storage-register (latch) clock (输出存储器锁存时钟端). Rising edge latches the current shift-register contents into the 8-bit output storage register that drives QA~QH.
13	G	input	Active-low output enable for the QA~QH tri-state parallel outputs (输出使能端). Low = outputs driven; high = outputs high-impedance. Does not affect Q'H.
14	SER	input	Serial data input (数据输入端). Sampled on the rising edge of SCK and shifted into the LSB of the internal shift register.
15	QA	tri_state	Parallel data output bit A (first of the QA~QH 8-bit outputs). Tri-state output controlled by G (pin 13).
16	VCC	power_in	Positive supply, 3.2 V to 6 V (typical 5 V); absolute max 6.5 V. Icc ≤ 5 µA (typical, static) at VCC = 6 V.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	DIP-16
Category	Logic
Pins	16

Ordering variants

74HC595NN
74HC595NM/TR
74HC595NMT/TR
74HC595NLQ/TR

CAD (KiCad official)

Symbol: 74HC595N
Footprint: Package_DIP:DIP-16_W7.62mm
3D model: DIP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`74hc595n.step`	505 KB	You want the bare part, or you mark your own boards.
`74hc595n-etched.step`	2.1 MB	You want the part with `74HC595N` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 535 faces against 284 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (13 pp, sha256 2466d95b2f765594, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF