BQ25896RTWT from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBUS	power_in	Charger input voltage connected through the internal RBFET to PMID; place a 1-µF ceramic capacitor from VBUS to PGND as close as possible to the IC.
2	PSEL	input	Power source selection input; High indicates a USB host source and Low indicates an adapter source.
3	PG	output	Open-drain active-low power good indicator, connect to pull-up rail via 10-kΩ resistor; LOW indicates a good input source.
4	STAT	output	Open-drain charge status output with 10-kΩ pull-up; LOW indicates charge in progress, HIGH indicates charge complete or disabled, blinks at 1 Hz on fault.
5	SCL	input	I2C interface clock; connect to the logic rail through a 10-kΩ resistor.
6	SDA	bidirectional	I2C interface data; connect to the logic rail through a 10-kΩ resistor.
7	INT	output	Open-drain interrupt output with 10-kΩ pull-up that sends an active-low 256-µs pulse to the host to report charger status and faults.
8	OTG	input	Boost mode enable pin; boost mode is activated when OTG_CONFIG = 1, OTG pin is high, and no input source is detected at VBUS.
9	CE	input	Active-low charge enable pin; charging is enabled when CHG_CONFIG = 1 and CE = Low, and the pin must be pulled High or Low.
10	ILIM	input	Input current limit pin regulated at 0.8 V; a resistor to ground sets IINMAX = KILIM/RILIM, usable for input current monitoring, and limits below 500 mA are not supported.
11	TS	input	Temperature qualification voltage input for an NTC thermistor (103AT-2 recommended) with a divider from REGN; charge suspends when TS is out of range.
12	QON	input	BATFET enable/reset control input with internal pull-up; low for tSHIPMODE (typ 1 s) exits ship mode, low for tQON_RST (typ 18 s) resets the system power.
13	BAT	power_in	Battery connection point to the positive battery terminal, with the internal BATFET between BAT and SYS; connect 10 µF close to the pin.
14	BAT	power_in	Battery connection point to the positive battery terminal, with the internal BATFET between BAT and SYS; connect 10 µF close to the pin.
15	SYS	power_out	System connection point kept above the minimum system voltage by the converter; connect 20 µF close to the pin.
16	SYS	power_out	System connection point kept above the minimum system voltage by the converter; connect 20 µF close to the pin.
17	PGND	power_in	Power ground for the high-current converter node, connected internally to the LSFET source; single-point connection to analog GND recommended.
18	PGND	power_in	Power ground for the high-current converter node, connected internally to the LSFET source; single-point connection to analog GND recommended.
19	SW	power_out	Switching node connecting to the output inductor, with a 0.047-µF bootstrap capacitor from SW to BTST.
20	SW	power_out	Switching node connecting to the output inductor, with a 0.047-µF bootstrap capacitor from SW to BTST.
21	BTST	power_in	PWM high-side driver positive supply connected to the bootstrap diode anode; connect a 0.047-µF capacitor from SW to BTST.
22	REGN	power_out	PWM low-side driver positive supply output and TS bias rail; connect a 4.7-µF (10 V rating) ceramic capacitor to analog GND.
23	PMID	passive	Connected to the drain of the reverse blocking MOSFET and the HSFET drain; put 1 µF on VBUS to PGND and the remaining input capacitance on PMID to PGND.
24	NC	unconnected	No connect.
25	PowerPAD	power_in	Exposed pad for heat dissipation; always solder to the board with vias star-connecting to PGND and the ground plane.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-24-EP(4x4)
Category	Power Supply Chip
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Voltage VBUS	VBUS	-2		22	V	converter not switching	7
Voltage PMID	PMID	-0.3		22	V	converter not switching	7
Voltage STAT	STAT	-0.3		20	V		7
Voltage PG	PG	-0.3		7	V		7
Voltage BTST	BTST	-0.3		20	V		7
Voltage SW	SW	-2		16	V		7
Voltage SW peak	SW	-3		16	V	peak for 10 ns duration	7
Voltage BAT, SYS		-0.3		6	V	converter not switching	7
Voltage SDA, SCL, INT, OTG, REGN, TS, CE, QON		-0.3		7	V		7
Voltage PSEL	PSEL	-0.3		7	V		7
Voltage BTST to SW	BTST TO SW	-0.3		7	V		7
Voltage PGND to GND	PGND to GND	-0.3		0.3	V		7
Voltage ILIM	ILIM	-0.3		5	V		7
Output sink current INT, STAT				6	mA	output sink current	7
Output sink current PG				6	mA	output sink current	7
Junction temperature	TJ	-40		150	°C		7
Storage temperature range	Tstg	-65		150	°C		7
Input voltage	VIN	3.9		14	V		7
Input current (VBUS)	IIN			3.25	A		7
Output current (SW)	ISYS			5	A		7
Battery voltage	VBAT			4.608	V		7
Fast charging current	IBAT			3	A		7
Discharging current with internal MOSFET	IBAT			6	A	continuous	7
Discharging current with internal MOSFET peak	IBAT			9	A	peak, up to 1 sec duration	7
Operating free-air temperature range	TA	-40		85	°C		7
Battery discharge current (BAT, SW, SYS) in buck mode	IBAT			5	µA	VBAT = 4.2 V, V(VBUS) < V(UVLO), leakage between BAT and VBUS	8
Battery discharge current in High-Z mode, BATFET disabled	IBAT		12	23	µA	High-Z mode, no VBUS, BATFET disabled (REG09[5]=1), battery monitor disabled, TJ < 85°C	8
Battery discharge current in High-Z mode, BATFET enabled	IBAT		32	60	µA	High-Z mode, no VBUS, BATFET enabled (REG09[5]=0), battery monitor disabled, TJ < 85°C	8
Input supply current (VBUS) in High-Z mode	I(VBUS_HIZ)		15	35	µA	V(VBUS)= 5 V, High-Z mode, no battery, battery monitor disabled	8
Input supply current (VBUS) in buck mode	I(VBUS)		1.5	3	mA	VBUS > V(UVLO), VBUS > VBAT, converter not switching	8
VBUS operating range	V(VBUS_OP)	3.9		14	V		8
Sleep mode falling threshold	V(SLEEP)	25	65	120	mV		8
Sleep mode rising threshold	V(SLEEPZ)	130	250	370	mV		8
Minimum DC system voltage output	VSYS(MIN)	3.5		3.65	V	VBAT< VSYS(MIN), SYS_MIN = 3.5 V (REG03[3:1]=101), ISYS= 0 A	8
Top reverse blocking MOSFET (RBFET) on-resistance TJ -40 to +85	RON(RBFET)	27		38	mΩ	TJ = -40°C to +85°C	8
Top reverse blocking MOSFET (RBFET) on-resistance TJ -40 to +125	RON(RBFET)	27		44	mΩ	TJ= -40°C to +125°C	8
Top switching MOSFET (HSFET) on-resistance TJ -40 to +85	RON(HSFET)	33		45	mΩ	TJ = -40°C to +85°C	9
Top switching MOSFET (HSFET) on-resistance TJ -40 to +125	RON(HSFET)	33		53	mΩ	TJ = -40°C to +125°C	9
Bottom switching MOSFET (LSFET) on-resistance TJ -40 to +85	RON(LSFET)	18		26	mΩ	TJ = -40°C to +85°C	9
Bottom switching MOSFET (LSFET) on-resistance TJ -40 to +125	RON(LSFET)	18		30	mΩ	TJ = -40°C to +125°C	9
Charge voltage resolution accuracy	VBAT(REG)	-0.5		0.5	%	VBAT = 4.208 V (REG06[7:2]=010111) or VBAT = 4.352 V (REG06[7:2]=100000), TJ = -40°C to +85°C	9
Fast charge current regulation accuracy	I(CHG_REG_ACC)	-20		20	%	VBAT = 3.1 V or 3.8 V, ICHG = 128 mA, TJ = -40°C to +85°C	9
Fast charge current regulation accuracy	I(CHG_REG_ACC)	-10		10	%	VBAT= 3.1 V or 3.8 V, ICHG = 256 mA, TJ = -40°C to +85°C	9
Fast charge current regulation accuracy	I(CHG_REG_ACC)	-5		5	%	VBAT= 3.1 V or 3.8 V, ICHG=1792 mA, TJ = -40°C to +85°C	9
Input current regulation accuracy 1.5 A adapter	IIN(DPM_ACC)	1300	1400	1500	mA	Adapter 1.5 A, IINLIM (REG00[5:0]) = 1500 mA	9
Input current 100-mA regulation accuracy	IIN(DPM100_ACC)	85	90	100	mA	VBAT = 5 V, current pulled from SW, IINLIM (REG00[5:0]) =100 mA	9
PWM switching frequency, oscillator frequency	FSW	1.32		1.68	MHz	Oscillator frequency	10
Typical boost mode regulation voltage range	V(OTG_REG_RANGE)	4.55		5.55	V		10
Boost mode regulation voltage accuracy	V(OTG_REG_ACC)	-3		3	%	I(VBUS) = 0 A, BOOSTV=4.998V (REG0A[7:4] = 0111)	10
Typical boost mode output current range	I(OTG)	0.5		2	A		10
Boost mode over-voltage threshold	V(OTG_OVP)	5.8		6	V	Rising threshold	10
REGN LDO output voltage	V(REGN)	4.8	5	5.5	V	V(VBUS) = 9 V, I(REGN) = 40 mA	11
Input current regulation by ILIM pin constant	KILIM	320	355	390	A x Ω	Input current regulation by ILIM pin = 1.5 A	10
Input high threshold level, SCL and SDA	VIH	1.3			V	Pull-up rail 1.8 V	11
Junction-to-ambient thermal resistance	RθJA		31.8		°C/W		8
Junction-to-case (top) thermal resistance	RθJC(top)		27.9		°C/W		8
Junction-to-board thermal resistance	RθJB		8.7		°C/W		8
Junction-to-top characterization parameter	ψJT		0.3		°C/W		8
Junction-to-board characterization parameter	ψJB		8.7		°C/W		8
Junction-to-case (bottom) thermal resistance	RθJC(bot)		2		°C/W		8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	copper		1. Place input capacitor as close as possible to PMID pin and GND pin connections and use shortest copper	55

CAD (KiCad official)

Symbol: BQ25896RTWT
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
3D model files: bq25896rtwt-etched.step / bq25896rtwt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25896rtwt.step / bq25896rtwt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (65 pp, sha256 0daf169500794ae6, retrieved 2026-11-07, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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BQ25896RTWT

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