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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM8S207C8T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8S207C8T6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	bidirectional	Reset pin: external active-low reset input and internal reset output (open-drain with internal pull-up), also usable as bootloader trigger.
2	PA1/OSCIN	bidirectional	Port A1 I/O (floating/weak pull-up, external interrupt capable, slow speed O1) or resonator/crystal oscillator input (OSCIN).
3	PA2/OSCOUT	bidirectional	Port A2 I/O (floating/weak pull-up, external interrupt capable, slow speed O1) or resonator/crystal oscillator output (OSCOUT).
4	VSSIO_1	power_in	I/O ground supply pin.
5	VSS	power_in	Digital ground supply pin.
6	VCAP	passive	Connection for external decoupling capacitor (470 nF to 3300 nF, ESR<0.3 Ω at 1 MHz) for the internal 1.8 V main voltage regulator.
7	VDD	power_in	Digital power supply pin, operating range 2.95 V to 5.5 V.
8	VDDIO_1	power_in	I/O power supply pin.
9	PA3/TIM2_CH3	bidirectional	Port A3 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function TIM2 channel3 capture/compare, remappable to TIM3_CH1 via AFR1 option bit.
10	PA4/UART1_RX	bidirectional	High-sink Port A4 I/O (speed O3); default alternate function UART1 receive data input, pulled up by the ROM bootloader during its activation.
11	PA5/UART1_TX	bidirectional	High-sink Port A5 I/O (speed O3); default alternate function UART1 transmit data output.
12	PA6/UART1_CK	bidirectional	High-sink Port A6 I/O (speed O3); default alternate function UART1 synchronous clock output.
13	VDDA	power_in	Analog power supply pin for the ADC and analog blocks (3 V to 5.5 V).
14	VSSA	power_in	Analog ground supply pin for the ADC and analog blocks.
15	PB7/AIN7	bidirectional	Port B7 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 7.
16	PB6/AIN6	bidirectional	Port B6 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 6.
17	PB5/AIN5	bidirectional	Port B5 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 5, remappable to I2C_SDA via AFR6 option bit.
18	PB4/AIN4	bidirectional	Port B4 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 4, remappable to I2C_SCL via AFR6 option bit.
19	PB3/AIN3	bidirectional	Port B3 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 3, remappable to TIM1_ETR via AFR5 option bit.
20	PB2/AIN2	bidirectional	Port B2 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 2, remappable to TIM1_CH3N via AFR5 option bit.
21	PB1/AIN1	bidirectional	Port B1 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 1, remappable to TIM1_CH2N via AFR5 option bit.
22	PB0/AIN0	bidirectional	Port B0 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 0, remappable to TIM1_CH1N via AFR5 option bit.
23	PE7/AIN8	bidirectional	Port E7 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 8.
24	PE6/AIN9	bidirectional	Port E6 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function ADC analog input channel 9.
25	PE5/SPI_NSS	bidirectional	Port E5 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function SPI master/slave select signal.
26	PC1/TIM1_CH1	bidirectional	High-sink Port C1 I/O (speed O3); default alternate function Timer1 channel1 capture/compare.
27	PC2/TIM1_CH2	bidirectional	High-sink Port C2 I/O (speed O3); default alternate function Timer1 channel2 capture/compare.
28	PC3/TIM1_CH3	bidirectional	High-sink Port C3 I/O (speed O3); default alternate function Timer1 channel3 capture/compare.
29	PC4/TIM1_CH4	bidirectional	High-sink Port C4 I/O (speed O3); default alternate function Timer1 channel4 capture/compare.
30	PC5/SPI_SCK	bidirectional	High-sink Port C5 I/O (speed O3); default alternate function SPI serial clock, up to 10 Mbit/s.
31	VSSIO_2	power_in	I/O ground supply pin.
32	VDDIO_2	power_in	I/O power supply pin.
33	PC6/SPI_MOSI	bidirectional	High-sink Port C6 I/O (speed O3); default alternate function SPI master-out/slave-in data line.
34	PC7/SPI_MISO	bidirectional	High-sink Port C7 I/O (speed O3); default alternate function SPI master-in/slave-out data line.
35	PG0/CAN_TX	bidirectional	Port G0 I/O (floating/weak pull-up, slow speed O1); default alternate function beCAN transmit, note beCAN interface is available on STM8S208xx devices only (not enabled on this STM8S207xx part).
36	PG1/CAN_RX	bidirectional	Port G1 I/O (floating/weak pull-up, slow speed O1); default alternate function beCAN receive, note beCAN interface is available on STM8S208xx devices only (not enabled on this STM8S207xx part).
37	PE3/TIM1_BKIN	bidirectional	Port E3 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function Timer1 break input.
38	PE2/I2C_SDA	bidirectional	True open-drain Port E2 I/O (no P-buffer, weak pull-up, or protection diode to VDD); default alternate function I2C data line, up to 400 kbit/s.
39	PE1/I2C_SCL	bidirectional	True open-drain Port E1 I/O (no P-buffer, weak pull-up, or protection diode to VDD); default alternate function I2C clock line, up to 400 kbit/s.
40	PE0/CLK_CCO	bidirectional	High-sink Port E0 I/O (speed O3); default alternate function configurable main clock output (CCO).
41	PD0/TIM3_CH2	bidirectional	High-sink Port D0 I/O (speed O3); default alternate function Timer3 channel2, remappable to TIM1_BKIN (AFR3) or CLK_CCO (AFR2, which has priority over AFR3 if both are set).
42	PD1/SWIM	bidirectional	High-sink Port D1 I/O (speed O4); Single Wire Interface Module (SWIM) data pin for debug/programming, held in input pull-up state during and after the reset phase.
43	PD2/TIM3_CH1	bidirectional	High-sink Port D2 I/O (speed O3); default alternate function Timer3 channel1, remappable to TIM2_CH3 via AFR1 option bit.
44	PD3/TIM2_CH2	bidirectional	High-sink Port D3 I/O (speed O3); default alternate function Timer2 channel2, remappable to ADC_ETR (ADC external trigger) via AFR0 option bit.
45	PD4/TIM2_CH1/BEEP	bidirectional	High-sink Port D4 I/O (speed O3); default alternate function Timer2 channel1, remappable to BEEP output (1/2/4 kHz) via AFR7 option bit.
46	PD5/UART3_TX	bidirectional	Port D5 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function UART3 transmit data output.
47	PD6/UART3_RX	bidirectional	Port D6 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function UART3 receive data input, pulled up by the ROM bootloader during its activation.
48	PD7/TLI	bidirectional	Port D7 I/O (floating/weak pull-up, external interrupt, slow speed O1); default alternate function Top Level Interrupt input (TLI); the TIM1_CH4 remap option (AFR4) is only available on the 44-pin package, so on this 48-pin package AFR4 is reserved and must be kept at 0.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

CAD (KiCad official)

Symbol: STM8S207C8T6TR
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: stm8s207c8t6tr-etched.step / stm8s207c8t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s207c8t6tr.step / stm8s207c8t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (117 pp, sha256 7adeaa849cf9e22f, retrieved 2026-09-23, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF