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SN74LV8154PWR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV8154PWR
Texas Instruments · Counters, Dividers · TSSOP-20
SN74LV8154PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKA | input | Clock A is the rising-edge count clock for counter A, with a minimum high or low pulse width of 10 ns. |
| 2 | CLKB | input | Clock B is the rising-edge count clock for counter B, with a minimum high or low pulse width of 10 ns, and is gated by CLKBEN. |
| 3 | GAL | input | Gate A lower byte; active-low puts the lower byte of stored counter A on the Y bus, and all four gates high puts Y in high impedance. |
| 4 | GAU | input | Gate A upper byte; active-low puts the upper byte of stored counter A on the Y bus, and all four gates high puts Y in high impedance. |
| 5 | GBL | input | Gate B lower byte; active-low puts the lower byte of stored counter B on the Y bus, and all four gates high puts Y in high impedance. |
| 6 | GBU | input | Gate B upper byte; active-low puts the upper byte of stored counter B on the Y bus, and all four gates high puts Y in high impedance. |
| 7 | RCLK | input | Register clock; the rising edge stores both counters into the internal storage register, with a minimum pulse width of 10 ns. |
| 8 | RCOA | output | Ready case overflow A is active-low when counter A is at full count and ready to overflow on the next CLKA clock. |
| 9 | CLKBEN | input | Clock B enable is active-low and allows counter B to be clocked; connect it to RCOA for a 32-bit counter. |
| 10 | GND | power_in | Ground pin. |
| 11 | CCLR | input | Asynchronous active-low clear for both counters, requiring a low time of at least 20 ns. |
| 12 | Y7 | output | Data output bit 7 (MSB) of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 13 | Y6 | output | Data output bit 6 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 14 | Y5 | output | Data output bit 5 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 15 | Y4 | output | Data output bit 4 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 16 | Y3 | output | Data output bit 3 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 17 | Y2 | output | Data output bit 2 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 18 | Y1 | output | Data output bit 1 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 19 | Y0 | output | Data output bit 0 (LSB) of the 8-bit mapped read bus, which is set to high impedance when all four gates are high. |
| 20 | VCC | power_in | Power supply pin; the device operates from 2 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LV8154PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74lv8154pwr-etched.step/sn74lv8154pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv8154pwr.step/sn74lv8154pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
7ab3edfeccfab88d, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).