component
LM5141RGER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM5141RGER
Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)
LM5141RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DEMB | input | Diode emulation pin: connect to AGND to enable diode emulation, to VDDA for forced PWM with continuous conduction at light load, or use it as an external synchronization input. |
| 2 | VDDA | power_out | Internal analog bias regulator output; connect a capacitor from VDDA to AGND. |
| 3 | AGND | power_in | Analog ground return for the internal voltage reference and analog circuits. |
| 4 | RT | input | A resistor from RT to ground shifts the oscillator from 2.2 MHz (1.8 to 2.53 MHz) or 440 kHz (300 to 500 kHz), and an analog voltage applied through a resistor can also shift the frequency. |
| 5 | DITH | output | A capacitor to AGND is charged and discharged by a 20 µA source to dither the oscillator between -5% and +5%; connecting DITH to VDDA disables dithering, and it is ignored when an external sync clock is used. |
| 6 | OSC | input | Frequency select pin: connect to VDDA for 2.2 MHz or to AGND for 440 kHz. |
| 7 | LOL | output | Low-side gate driver turn-off output. |
| 8 | LO | output | Low-side gate driver turn-on output. |
| 9 | PGND | power_in | Power ground connection for the low-side NMOS gate driver. |
| 10 | VCC | power_out | VCC bias supply pin; connect a capacitor from VCC to PGND, with recommended VCC of up to 5.25 V (absolute maximum 6.5 V). |
| 11 | HB | power_out | High-side driver supply for bootstrap gate drive; recommended HB to SW is up to 5.25 V (absolute maximum 6.5 V). |
| 12 | SW | passive | Switching node of the buck regulator; connect to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain. |
| 13 | HO | output | High-side gate driver turn-on output. |
| 14 | HOL | output | High-side gate driver turn-off output. |
| 15 | VIN | power_in | Supply voltage input for the VCC regulator; recommended input range is 3.8 V to 65 V (70 V absolute maximum). |
| 16 | VCCX | power_in | Optional external bias input: if VCCX is above 4.5 V it is connected internally to VCC and the internal VCC regulator is disabled; ground it if unused. |
| 17 | VOUT | input | Current sense amplifier input; connect to the output side of the current sense resistor. |
| 18 | CS | input | Current sense amplifier input; make a low-current Kelvin connection to the inductor side of the external current sense resistor. |
| 19 | FB | input | Connect to VDDA for a fixed 3.3 V output or to AGND for a fixed 5 V output; otherwise a divider sets 1.5 V to 15 V with a 1.2 V regulation threshold. |
| 20 | COMP | input | Output of the transconductance error amplifier. |
| 21 | PG | output | Open-collector output that switches low when VOUT is outside the power-good window. |
| 22 | SS | input | Soft-start programming pin: an external capacitor and internal 20 µA source set the reference ramp, and pulling SS below 80 mV turns off the gate driver outputs. |
| 23 | EN | input | Active-high logic input that enables the controller. |
| 24 | RES | output | Restart timer pin: an external capacitor sets the hiccup-mode off time, hiccup starts after 512 consecutive PWM cycles with cycle-by-cycle current limiting, and connecting RES to VDD at power-up disables hiccup protection. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LM5141RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
lm5141rger-etched.step/lm5141rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5141rger.step/lm5141rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
7e612d227f860930, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).