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MSP430FR2353TRSMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR2353TRSMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-32(4x4)
MSP430FR2353TRSMR from Texas Instruments, in a VQFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.1 | bidirectional | General-purpose I/O P1.1 that also carries UCB0CLK, ACLK output, OA0O, COMP0.1 and analog input A1; reset default is OFF (high-impedance input with pullup/pulldown disabled). |
| 2 | P1.0 | bidirectional | General-purpose I/O P1.0 that also carries UCB0STE, SMCLK output, COMP0.0, analog input A0 and the ADC positive reference Veref+; reset default is OFF. |
| 3 | TEST/SBWTCK | input | Test mode pin and Spy-Bi-Wire clock input; it always has an internal pulldown enabled, so leave it open when unused. |
| 4 | RST/NMI/SBWTDIO | bidirectional | Reset (RST), non-maskable interrupt (NMI) and Spy-Bi-Wire data (SBWTDIO); when unused, use a 47-kΩ pullup to DVCC or the internal pullup with a 10-nF (or 1.1-nF) pulldown. |
| 5 | DVCC | power_in | Main power supply pin for digital and analog modules; supply is 1.8 V to 3.6 V with a recommended 4.7 µF to 10 µF capacitor at DVCC. |
| 6 | DVSS | power_in | Ground reference pin for the device at 0 V. |
| 7 | P2.7/TB0CLK/XIN | bidirectional | General-purpose I/O P2.7 that also provides the TB0CLK timer clock input and the crystal oscillator input XIN; reset default is OFF. |
| 8 | P2.6/MCLK/XOUT | bidirectional | General-purpose I/O P2.6 that also provides the MCLK output and the crystal oscillator output XOUT; reset default is OFF. |
| 9 | P2.5/COMP1.0 | bidirectional | General-purpose I/O P2.5 that also serves as eCOMP1 comparator input COMP1.0; reset default is OFF. |
| 10 | P2.4/COMP1.1 | bidirectional | General-purpose I/O P2.4 that also serves as eCOMP1 comparator input COMP1.1; reset default is OFF. |
| 11 | P4.7/UCB1SOMI/UCB1SCL | bidirectional | General-purpose I/O P4.7 that also carries eUSCI_B1 SOMI in SPI mode or SCL in I2C mode; reset default is OFF. |
| 12 | P4.6/UCB1SIMO/UCB1SDA | bidirectional | General-purpose I/O P4.6 that also carries eUSCI_B1 SIMO in SPI mode or SDA in I2C mode; reset default is OFF. |
| 13 | P4.3/UCA1TXD/UCA1SIMO | bidirectional | General-purpose I/O P4.3 that also carries eUSCI_A1 TXD in UART mode or SIMO in SPI mode; reset default is OFF. |
| 14 | P4.2/UCA1RXD/UCA1SOMI | bidirectional | General-purpose I/O P4.2 that also carries eUSCI_A1 RXD in UART mode or SOMI in SPI mode; reset default is OFF. |
| 15 | P4.1/UCA1CLK | bidirectional | General-purpose I/O P4.1 that also carries the eUSCI_A1 clock UCA1CLK; reset default is OFF. |
| 16 | P4.0/UCA1STE/ISOTXD/ISORXD | bidirectional | General-purpose I/O P4.0 that also carries eUSCI_A1 STE, ISOTXD and ISORXD; reset default is OFF. |
| 17 | P2.1/TB1.2/COMP1.O | bidirectional | General-purpose I/O P2.1 that also carries Timer TB1 CCR2 (TB1.2) and the eCOMP1 comparator output COMP1.O; reset default is OFF. |
| 18 | P2.0/TB1.1/COMP0.O | bidirectional | General-purpose I/O P2.0 that also carries Timer TB1 CCR1 (TB1.1) and the eCOMP0 comparator output COMP0.O; reset default is OFF. |
| 19 | P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO/OA1+/A7/VREF+ | bidirectional | General-purpose I/O P1.7 that also carries eUSCI_A0 TXD/SIMO, Timer TB0.2, JTAG TDO, OA1+, analog input A7 and VREF+; reset default is OFF. |
| 20 | P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK/OA1-/A6 | bidirectional | General-purpose I/O P1.6 that also carries eUSCI_A0 RXD/SOMI, Timer TB0.1, JTAG TDI/TCLK, OA1- and analog input A6; reset default is OFF. |
| 21 | P1.5/UCA0CLK/TMS/OA1O/A5 | bidirectional | General-purpose I/O P1.5 that also carries eUSCI_A0 clock, JTAG TMS, OA1O and analog input A5; reset default is OFF. |
| 22 | P1.4/UCA0STE/TCK/A4 | bidirectional | General-purpose I/O P1.4 that also carries eUSCI_A0 STE, JTAG TCK and analog input A4; reset default is OFF. |
| 23 | P3.7/OA3+ | bidirectional | General-purpose I/O P3.7 that also serves as the non-inverting input OA3+ of SAC3 (MSP430FR235x devices only); reset default is OFF. |
| 24 | P3.6/OA3- | bidirectional | General-purpose I/O P3.6 that also serves as the inverting input OA3- of SAC3 (MSP430FR235x devices only); reset default is OFF. |
| 25 | P3.5/OA3O | bidirectional | General-purpose I/O P3.5 that also serves as the SAC3 operational amplifier output OA3O (MSP430FR235x devices only); reset default is OFF. |
| 26 | P3.4/SMCLK | bidirectional | General-purpose I/O P3.4 that also provides the SMCLK output; reset default is OFF. |
| 27 | P3.3/OA2+ | bidirectional | General-purpose I/O P3.3 that also serves as the non-inverting input OA2+ of SAC2 (MSP430FR235x devices only); reset default is OFF. |
| 28 | P3.2/OA2- | bidirectional | General-purpose I/O P3.2 that also serves as the inverting input OA2- of SAC2 (MSP430FR235x devices only); reset default is OFF. |
| 29 | P3.1/OA2O | bidirectional | General-purpose I/O P3.1 that also serves as the SAC2 operational amplifier output OA2O (MSP430FR235x devices only); reset default is OFF. |
| 30 | P3.0/MCLK | bidirectional | General-purpose I/O P3.0 that also provides the MCLK output; reset default is OFF. |
| 31 | P1.3/UCB0SOMI/UCB0SCL/OA0+/A3 | bidirectional | General-purpose I/O P1.3 that also carries eUSCI_B0 SOMI/SCL, OA0+ and analog input A3; reset default is OFF. |
| 32 | P1.2/UCB0SIMO/UCB0SDA/TB0TRG/OA0-/A2/Veref- | bidirectional | General-purpose I/O P1.2 that also carries eUSCI_B0 SIMO/SDA, Timer TB0 external trigger TB0TRG, OA0-, analog input A2 and the ADC negative reference Veref-; reset default is OFF. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSP430FR2353TRSMR - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: VQFN-32(4x4) (KiCad packages3D, STEP)
- 3D model files:
msp430fr2353trsmr-etched.step/msp430fr2353trsmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr2353trsmr.step/msp430fr2353trsmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (152 pp, sha256
5c9415ae2d5d14ad, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).