MCP4541-502E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	HVC/A0	input	Address 0 input for the I2C interface, latched at POR/BOR, and the high-voltage command pin, where HVC/A0 = VIHH selects a High Voltage command.
2	SCL	input	I2C serial clock input from the host controller; the device is a slave and accepts only external clock signals.
3	SDA	bidirectional	I2C serial data I/O, implemented as an open-drain N-channel driver.
4	VSS	power_in	Ground reference for the device.
5	P0A	passive	Potentiometer 0 Terminal A, connected to the full-scale wiper value (0x80 for 7-bit devices), with a voltage that must be between VSS and VDD.
6	P0W	passive	Potentiometer 0 wiper terminal, the adjustable terminal, with a voltage that must be between VSS and VDD and which can carry positive and negative current.
7	P0B	passive	Potentiometer 0 Terminal B, fixed to the zero-scale wiper value (0x00), with a voltage that must be between VSS and VDD.
8	VDD	power_in	Positive power supply input relative to VSS; electrical performance may not meet the data sheet specifications while VDD is below Vmin (2.7V).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	MSOP-8
Category	ADC/DAC/Data Conversion
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Voltage on VDD with respect to VSS	VDD	-0.6		7	V		3
Voltage on HVC/A0, A1, A2, SCL and SDA with respect to VSS		-0.6		12.5	V		3
Voltage on all other pins (PxA, PxW, PxB) with respect to VSS		-0.3			V	Printed maximum is VDD + 0.3 V	3
Input clamp current	IIK	-20		20	mA	VI < 0, VI > VDD, VI > VPP ON HV pins	3
Output clamp current	IOK	-20		20	mA	VO < 0 or VO > VDD	3
Maximum output current sunk by any Output pin				25	mA		3
Maximum output current sourced by any Output pin				25	mA		3
Maximum current out of VSS pin				100	mA		3
Maximum current into VDD pin				100	mA		3
Maximum current into PXA, PXW and PXB pins		-2.5		2.5	mA		3
Storage temperature		-65		150	°C		3
Ambient temperature with power applied		-40		125	°C		3
Soldering temperature of leads				300	°C	10 seconds	3
ESD protection, HBM		4			kV	HBM, all pins	3
ESD protection, MM		300			V	MM, all pins	3
Maximum junction temperature	TJ			150	°C		3
Supply voltage	VDD	2.7		5.5	V		4
Supply voltage, device operation	VDD	1.8		2.7	V	Serial interface only.	4
HVC pin voltage range	VHV			12.5	V	VDD ≥ 4.5V	4
VDD start voltage to ensure wiper reset	VBOR			1.65	V	RAM retention voltage (VRAM) < VBOR	4
Delay after device exits the reset state	TBORD		10	20	µs	VDD > VBOR	4
Supply current, serial interface active at 3.4 MHz	IDD			600	µA	Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 3.4 MHz	4
Supply current, serial interface active at 100 kHz	IDD			250	µA	Serial Interface Active, HVC/A0 = VIH (or VIL), write all 0's to Volatile Wiper 0, VDD = 5.5V, FSCL = 100 kHz	4
Supply current, serial interface inactive			2.5	5	µA	Serial Interface Inactive, (Stop condition, SCL = SDA = VIH), Wiper = 0, VDD = 5.5V, HVC/A0 = VIH	4
Nominal resistance RAB	RAB	4	5	6	kΩ	-502 devices	5
Resistance tolerance		-20		20	%	±20% on RAB, -502 devices	5
Wiper resistance RW	RW		75	160	Ω	VDD = 5.5 V, IW = 2.0 mA, code = 00h	5
Wiper resistance RW	RW		75	300	Ω	VDD = 2.7 V, IW = 2.0 mA, code = 00h	5
Full-scale error (MCP4XX1)	VWFSE	-4	-0.1		LSb	5 k, 7-bit, 3.0V ≤ VDD ≤ 5.5V	7
Zero-scale error (MCP4XX1)	VWZSE		0.1	3	LSb	5 k, 7-bit, 3.0V ≤ VDD ≤ 5.5V	7
Potentiometer integral non-linearity	INL	-0.5	0.25	0.5	LSb	7-bit, MCP4XX1 devices only (Note 2)	7
Potentiometer differential non-linearity	DNL	-0.25	0.125	0.25	LSb	7-bit, MCP4XX1 devices only (Note 2)	7
Rheostat integral non-linearity	R-INL	-1.125	0.5	1.125	LSb	5 k, 7-bit, 5.5V, IW = 900 µA	9
Rheostat integral non-linearity	R-INL	-6	4.5	6	LSb	5 k, 7-bit, 3.0V, IW = 480 µA (Note 7)	9
Rheostat differential non-linearity	R-DNL	-0.375	0.25	0.375	LSb	5 k, 7-bit, 5.5V, IW = 900 µA	10
Rheostat differential non-linearity	R-DNL	-0.75	0.5	0.75	LSb	5 k, 7-bit, 3.0V, IW = 480 µA (Note 7)	10
Maximum current through terminal A	IAW			2.5	mA	Terminal A IAW, W = Full-Scale (FS)	6
Maximum current through terminal B	IBW			2.5	mA	Terminal B IBW, W = Zero Scale (ZS)	6
Maximum current through terminal W	IAW or IBW			2.5	mA	Terminal W IAW or IBW, W = FS or ZS	6
Maximum current between terminal A and terminal B	IAB			1.38	mA	IAB, VB = 0V, VA = 5.5V, RAB(MIN) = 4000	6
Output low voltage (SDA)	VOL			0.4	V	VDD ≥ 2.0V, IOL = 3 mA	12
Weak pull-up current	IPU			1.75	mA	Internal VDD pull-up, VIHH pull-down; VDD = 5.5V, VIHH = 12.5V	12
Input leakage current	IIL	-1		1	µA	VIN = VDD and VIN = VSS	12
High voltage limit	VMAX			12.5	V	Pin can tolerate VMAX or less.	11
Specified temperature range	TA	-40		125	°C		16
Operating temperature range	TA	-40		125	°C		16
Standard mode clock rate	FSCL	0		100	kHz	Cb = 400 pF, 1.8V - 5.5V	13
Fast mode clock rate	FSCL	0		400	kHz	Cb = 400 pF, 2.7V - 5.5V	13
High-speed 1.7 MHz clock rate	FSCL	0		1.7	MHz	Cb = 400 pF, 4.5V - 5.5V	13
High-speed 3.4 MHz clock rate	FSCL	0		3.4	MHz	Cb = 100 pF, 4.5V - 5.5V	13
Bus capacitive loading Cb, 100 kHz mode	D102 Cb			400	pF	100 kHz mode	13
Bus capacitive loading Cb, 3.4 MHz mode	D102 Cb			100	pF	3.4 MHz mode	13
Nominal resistance temperature coefficient	RAB/T		50		ppm/°C	TA = -20°C to +70°C	5
Nominal resistance temperature coefficient	RAB/T		100		ppm/°C	TA = -40°C to +85°C	5
Nominal resistance temperature coefficient	RAB/T		150		ppm/°C	TA = -40°C to +125°C	5
Ratiometric temperature coefficient	VWB/T		15		ppm/°C	Code = Midscale (80h or 40h)	5
Thermal resistance, 8L-MSOP	JA		211		°C/W		16

CAD (KiCad official)

Symbol: MCP4541-502E
Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
3D model: MSOP-8 (KiCad packages3D, STEP)
3D model files: mcp4541-502e-etched.step / mcp4541-502e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4541-502e.step / mcp4541-502e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MCP4541-502E

Verified MCP4541-502E

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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