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Contents

README

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BQ25700ARSNR

Texas Instruments · Battery Management · QFN-32(4x4)

BQ25700ARSNR from Texas Instruments, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBUS power_in Charger input voltage, recommended to be filtered with a 1 Ω and 0.47 µF (minimum) input low-pass filter; recommended operating range is 0 to 24 V.
2 ACN input Input current sense resistor negative input, with series resistors placed between the sense resistor and the filter cap; ACP-ACN differential is limited to −0.35 V to 0.35 V in recommended operation.
3 ACP input Input current sense resistor positive input, with series resistors placed between the sense resistor and the filter cap; ACP-ACN differential is limited to −0.35 V to 0.35 V in recommended operation.
4 CHRG_OK output Open-drain active-high indicator that a good power source is connected to the charger input, requiring a 10 kΩ pullup; recommended operating range is 0 to 6.5 V.
5 EN_OTG input Active-high enable for USB OTG mode, which additionally requires REG0x32[13] to be high; recommended operating range is 0 to 6.5 V.
6 ILIM_HIZ input Input current limit programming pin set by a resistor divider from a supply rail, where pin voltage below 0.4 V enters Hi-Z mode and above 0.8 V exits Hi-Z mode; recommended operating range is 0 to 6.5 V.
7 VDDA power_in Internal reference bias pin, fed from REGN through a 10 Ω resistor and decoupled with a 1 µF ceramic capacitor to power ground; recommended operating range is 0 to 6.5 V.
8 IADPT bidirectional Buffered adapter current output with V(IADPT) = 20 or 40 × (V(ACP) − V(ACN)), clamped below 3.3 V, and recommended operating range is 0 to 3.3 V.
9 IBAT output Buffered battery current output, with V(IBAT) = 8 or 16 × (V(SRP) − V(SRN)) for charge current, clamped below 3.3 V; the pin may be left floating if unused.
10 PSYS output Current-mode system power monitor output proportional to total adapter and battery power, clamped below 3.3 V; recommended operating range is 0 to 3.3 V.
11 PROCHOT output Active-low open-drain processor hot indicator that asserts a pulse when a PROCHOT profile event triggers, with recommended operating range 0 to 5.3 V.
12 SDA bidirectional SMBus open-drain data I/O requiring a 10 kΩ pullup; recommended operating range is 0 to 6.5 V.
13 SCL input SMBus clock input requiring a 10 kΩ pullup per SMBus specifications; recommended operating range is 0 to 6.5 V.
14 CMPIN input Input of the independent comparator, compared against an internal reference with output on CMPOUT; tie to ground if the comparator is unused.
15 CMPOUT output Open-drain output of the independent comparator that requires a pullup resistor to the pullup supply rail.
16 COMP1 passive Buck-boost converter compensation pin 1, with RC network per the bq25700 EVM schematic; recommended operating range is 0 to 6.5 V.
17 COMP2 passive Buck-boost converter compensation pin 2, with RC network per the bq25700 EVM schematic; recommended operating range is 0 to 6.5 V.
18 CELL_BATPRESZ input Battery cell selection pin for 1-4 cell setting, which also sets SYSOVP to 5 V (1-cell), 12 V (2-cell) or 19.5 V (3/4-cell), and a pull below VCELL_BATPRESZ_FALL indicates battery removal; recommended operating range is 0 to 6.5 V.
19 SRN input Charge current sense resistor negative input that also senses battery voltage, with recommended operating range 0 to 19.2 V and a 10 Ω series resistor for reverse-battery protection.
20 SRP input Charge current sense resistor positive input with a 0.1 µF differential filter to SRN, recommended operating range 0 to 19.2 V, and a 10 Ω series resistor for reverse-battery protection.
21 BATDRV output P-channel BATFET gate driver output that is shorted to VSYS to turn the BATFET off and sits 10 V below VSYS to fully enable it; recommended operating range is 0 to 19.2 V.
22 VSYS input Charger system voltage sense input, with the system regulation limit programmed in REG0x15() and REG0x3E(); recommended operating range is 0 to 19.2 V.
23 SW2 passive Boost-mode high-side MOSFET driver source, to be connected to the source of the high-side n-channel MOSFET; recommended operating range is −2 V to 24 V.
24 HIDRV2 output Boost-mode high-side power MOSFET (Q4) gate driver output; recommended operating range is 0 to 30 V with a differential limit of 0 to 6.5 V from SW2.
25 BTST2 power_out Boost-mode high-side driver bootstrap supply with a 0.047 µF capacitor to SW2 and an integrated bootstrap diode from REGN; recommended operating range is 0 to 30 V.
26 LODRV2 output Boost-mode low-side power MOSFET (Q3) gate driver output; recommended operating range is 0 to 6.5 V with absolute maximum of −4 V to 7 V at 2% duty cycle.
27 PGND power_in Device power ground.
28 REGN power_out 6 V linear regulator output supplied from VBUS or VSYS, active when VBUS is above VVBUS_CONVEN, which requires a 2.2 µF or 3.3 µF ceramic capacitor to power ground and supplies power-stage gate drive.
29 LODRV1 output Buck-mode low-side power MOSFET (Q2) gate driver output; recommended operating range is 0 to 6.5 V with absolute maximum of −4 V to 7 V at 2% duty cycle.
30 BTST1 power_out Buck-mode high-side driver bootstrap supply with a 0.047 µF capacitor between SW1 and BTST1 and an integrated bootstrap diode from REGN; recommended operating range is 0 to 30 V.
31 HIDRV1 output Buck-mode high-side power MOSFET (Q1) gate driver output; recommended operating range is 0 to 30 V with a differential limit of 0 to 6.5 V from SW1.
32 SW1 passive Buck-mode high-side MOSFET driver source, to be connected to the source of the high-side n-channel MOSFET; recommended operating range is −2 V to 24 V.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32(4x4)
Category Power Management (PMIC)
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
SRN, SRP, ACN, ACP, VBUS, VSYS, BATDRV voltage -0.3 30 V 8
SW1, SW2 voltage -2 30 V 8
BTST1, BTST2, HIDRV1, HIDRV2 voltage -0.3 36 V 8
LODRV1, LODRV2 voltage -4 7 V 2% duty cycle 8
HIDRV1, HIDRV2 voltage -4 36 V 2% duty cycle 8
SW1, SW2 voltage -4 30 V 2% duty cycle 8
SDA, SCL, REGN, CHRG_OK, CELL_BATPRESZ, ILIM_HIZ, LODRV1, LODRV2, VDDA, COMP1, COMP2, CMPIN, CMPOUT, EN_OTG voltage -0.3 7 V 8
PROCHOT voltage -0.3 5.5 V 8
IADPT, IBAT, PSYS voltage -0.3 3.6 V 8
BTST1-SW1, BTST2-SW2, HIDRV1-SW1, HIDRV2-SW2 differential voltage -0.3 7 V 8
SRP-SRN, ACP-ACN differential voltage -0.5 0.5 V 8
Junction temperature range TJ -40 155 °C 8
Storage temperature Tstg -40 155 °C 8
ACN, ACP, VBUS voltage 0 24 V 8
SRN, SRP, VSYS, BATDRV voltage 0 19.2 V 8
SW1, SW2 voltage -2 24 V 8
BTST1, BTST2, HIDRV1, HIDRV2 voltage 0 30 V 8
SDA, SCL, REGN, CHRG_OK, CELL_BATPRESZ, ILIM_HIZ, LODRV1, LODRV2, VDDA, COMP1, COMP2, CMPIN, CMPOUT voltage 0 6.5 V 8
PROCHOT voltage 0 5.3 V 8
IADPT, IBAT, PSYS voltage 0 3.3 V 8
BTST1-SW1, BTST2-SW2, HIDRV1-SW1, HIDRV2-SW2 differential voltage 0 6.5 V 8
SRP-SRN, ACP-ACN differential voltage -0.35 0.35 V 8
Junction temperature, operating TJ -40 125 °C 8
Operating free-air temperature TA -40 85 °C 9
Input voltage operating range VINPUT_OP 3.5 26 V 9
System voltage regulation range, measured on VSYS VSYSMAX_RNG 1.024 19.2 V 9
System voltage regulation accuracy (charge disable) VSYSMAX_ACC -2 2 % REG0x15() = 0x41A0H (16.800 V) 9
Minimum system voltage regulation accuracy (charge enable, VBAT below REG0x3E() setting) VSYSMIN_REG_ACC -2 2 % REG0x3E() = 0x3000H (12.288 V) 9
Battery voltage regulation range VBAT_RNG 1.024 19.2 V 9
Battery voltage regulation accuracy (charge enable) (0°C to 85°C) VBAT_REG_ACC -0.5 0.5 % REG0x15() = 0x41A0H (16.8 V) 9
Battery voltage regulation accuracy (charge enable) (0°C to 85°C) VBAT_REG_ACC -0.6 0.6 % REG0x15() = 0x20D0H (8.4 V) 9
Battery voltage regulation accuracy (charge enable) (0°C to 85°C) VBAT_REG_ACC -1.1 1.2 % REG0x15() = 0x1060H (4.192 V) 9
Charge current regulation accuracy, 10-mΩ current sensing resistor ICHRG_REG_ACC -3 2 % REG0x14() = 0x1000H (4096 mA), VBAT above 0x3E() setting (0°C to 85°C) 10
Charge current regulation accuracy, 10-mΩ current sensing resistor ICHRG_REG_ACC -12 12 % REG0x14() = 0x0200H (512 mA), VBAT above 0x3E() setting (0°C to 85°C) 10
Input current regulation accuracy (-40°C to 105°C) with 10-Ω ACP/ACN series resistor IDPM_REG_ACC 3820 4000 mA REG0x3F() = 0x4FFFH 10
Voltage range for input current regulation VIREG_DPM_RNG_ILIM 1 4 V 10
Input current regulation accuracy on ILIM_HIZ pin IDPM_REG_ACC_ILIM 3800 4000 4200 mA VILIM_HIZ = 2.6 V, with 10-Ω ACP/ACN series resistor 10
ILIM_HIZ pin leakage ILEAK_ILIM -1 1 µA 10
Input voltage regulation range, voltage on VBUS VIREG_DPM_RNG 3.2 19.52 V 10
Input voltage regulation accuracy VDPM_REG_ACC -2 2 % REG0x3D() = 0x3C80H (18688 mV) 11
Input voltage regulation accuracy VDPM_REG_ACC -3 5 % REG0x3D() = 0x0500H (4480 mV) 11
OTG voltage regulation accuracy VOTG_REG_ACC -2 2 % REG0x3B() = 0x3CC0H (20.032 V) 11
OTG voltage regulation accuracy VOTG_REG_ACC -3 3 % REG0x3B() = 0x0240H (5.056 V) 11
REGN regulator voltage (0 mA-60 mA) VREGN_REG 5.7 6 6.3 V VVBUS = 10 V 11
REGN voltage in drop out mode VDROPOUT 3.8 4.3 4.6 V VVBUS = 5 V, ILOAD = 20 mA 11
REGN current limit when converter is enabled IREGN_LIM_Charging 50 65 mA VVBUS = 10 V, force VREGN = 4 V 11
Quiescent current, system powered by battery, BATFET on (low power mode) IBAT_BATFET_ON 22 45 µA VBAT = 18 V, REG0x12[15] = 1, in low power mode 11
Quiescent current, system powered by battery, BATFET on IBAT_BATFET_ON 105 175 µA VBAT = 18 V, REG0x12[15] = 1, REG0x30[14:13] = 01, REGN off 11
Quiescent current, system powered by battery, BATFET on IBAT_BATFET_ON 60 90 µA VBAT = 18 V, REG0x12[15] = 1, REG0x30[14:13] = 10, REGN off 11
Quiescent current, system powered by battery, BATFET on IBAT_BATFET_ON 860 1150 µA VBAT = 18 V, REG0x12[15] = 0, REG0x30[12] = 0, REGN on, EN_PSYS 11
IADPT output clamp voltage VIADPT_CLAMP 3.1 3.2 3.3 V 12
Input current monitor accuracy VIADPT_ACC -2 2 % V(ACP-ACN) = 40.96 mV 12
Battery common mode range, voltage on SRP/SRN VSRP/N_OP 2.5 18 V 12
Junction-to-ambient thermal resistance RθJA 37.2 °C/W 9
Junction-to-case (top) thermal resistance RθJC(top) 26.1 °C/W 9
Junction-to-board thermal resistance RθJB 7.8 °C/W 9
Junction-to-top characterization parameter ψJT 0.3 °C/W 9
Junction-to-board characterization parameter ψJB 7.8 °C/W 9
Junction-to-case (bottom) thermal resistance RθJC(bot) 2.3 °C/W 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper 3. Place an inductor input pin as close as possible to the output pin of the switching MOSFET. Minimize the copper area of this trace to lower electrical and magnetic field radiation but make the trac 73

CAD (KiCad official)

  • Symbol: BQ25700ARSNR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
  • 3D model files: bq25700arsnr-etched.step / bq25700arsnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25700arsnr.step / bq25700arsnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (85 pp, sha256 c6904d034cbcdca9, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF