component
FAN3278TMX
Public Made by Adomby adom
onsemi Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownFAN3278TMX
onsemi · Gate Drivers · SOIC-8
FAN3278TMX from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENA | input | Enable input for channel A; pulling the pin LOW inhibits driver A, and it has TTL thresholds. |
| 2 | INA | input | Input to channel A (non-inverting); OUTA follows INA while VDD is above the internal operating threshold. |
| 3 | GND | power_in | Ground, the common ground reference for the input and output circuits. |
| 4 | INB | input | Input to channel B (inverting); OUTB is the inverse of INB while VDD is above the internal operating threshold. |
| 5 | OUTB | output | Gate drive output B, inverted from the input and held HIGH unless the required input is present and VDD is above the internal functional threshold. |
| 6 | VDD | power_in | Supply voltage that provides power to the IC. |
| 7 | OUTA | output | Gate drive output A, held LOW unless the required input is present and VDD is above the internal voltage threshold where the IC is functional. |
| 8 | ENB | input | Enable input for channel B; pulling the pin LOW inhibits driver B, and it has TTL thresholds. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD to PGND | VDD | -0.3 | 30 | V | 6 | ||
| Lead Soldering Temperature | TL | 260 | °C | 10 seconds | 6 | ||
| Junction Temperature | TJ | -55 | 150 | °C | 6 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 6 | ||
| Supply Voltage Range | VDD | 8 | 27 | V | 6 | ||
| Enable Voltage (ENA, ENB) | VEN | 0 | V | 6 | |||
| Input Voltage (INA, INB) | VIN | 0 | V | 6 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 6 | ||
| Optimum Operating Range | VDD | 8 | 27 | V | 7 | ||
| Supply Current | IDD | 1.3 | 2 | mA | Inputs / EN Not Connected | 7 | |
| INx Logic Low Threshold | VIL | 0.8 | 1.1 | V | 7 | ||
| INx Logic High Threshold | VIH | 1.8 | 2.25 | V | 7 | ||
| Logic Hysteresis Voltage | VHYS | 0.4 | 0.7 | 1 | V | 7 | |
| Enable Logic Low Threshold | VENL | 0.8 | 1.2 | V | EN from 5V to 0V | 7 | |
| Enable Logic High Threshold | VENH | 1.6 | 2.25 | V | EN from 0V to 5V | 7 | |
| Propagation A Delay, EN Rising | tD1 | 44 | 70 | ns | 0 - 5VIN, 1V/ns Slew Rate | 7 | |
| Propagation A Delay, EN Falling | tD2 | 33 | 60 | ns | 0, 5VIN, 1V/ns Slew Rate | 7 | |
| Propagation B Delay, EN Rising | tD2 | 39 | 70 | ns | 0 - 5VIN, 1V/ns Slew Rate | 7 | |
| Propagation B Delay, EN Falling | tD1 | 29 | 60 | ns | 0, 5VIN, 1V/ns Slew Rate | 7 | |
| OUTA Drive Voltage | VOUTA | 11 | 13 | V | VDD=27V, INA="HI" | 8 | |
| OUTB Drive Voltage, VDD, VOUTB | VOUTB | 11 | 13 | V | VDD=27V, INA="HI" | 8 | |
| OUTA Drive Voltage | VOUTA | 6.5 | 7 | V | VDD=10V, INB="HI" | 8 | |
| OUTB Drive Voltage, VDD, VOUTB | VOUTB | 6.5 | 7 | V | VDD=10V, INB="HI" | 8 | |
| Output A Rise Time | tON,N | 17 | 30 | ns | CLOAD=1000pF to GND | 8 | |
| Output A Fall Time | tOFF,N | 8 | 15 | ns | CLOAD=1000pF to GND | 8 | |
| Output B Fall Time | tON,P | 21 | 30 | ns | CLOAD=1000pF to VDD | 8 | |
| Output B Rise Time | tOFF,P | 8 | 15 | ns | CLOAD=1000pF to VDD | 8 | |
| Output Propagation Delay On | tD1 | 45 | 70 | ns | 0 - 5VIN, 1V/ns Slew Rate | 8 | |
| Output Propagation Delay Off | tD2 | 35 | 60 | ns | 0 - 5VIN, 1V/ns Slew Rate | 8 | |
| Thermal resistance, junction to bottom of leads, 8-Pin SOIC | ΘJL | 40 | °C/W | 8-Pin SOIC | 4 | ||
| Thermal resistance, junction to top of package, 8-Pin SOIC | ΘJT | 31 | °C/W | 8-Pin SOIC | 4 | ||
| Thermal resistance, junction to ambient, 8-Pin SOIC | ΘJA | 89 | °C/W | 8-Pin SOIC; natural convection, no heatsink (JEDEC) | 4 | ||
| Thermal characterization parameter, junction to board, 8-Pin SOIC | ΨJB | 43 | °C/W | 8-Pin SOIC | 4 | ||
| Thermal characterization parameter, junction to top center, 8-Pin SOIC | ΨJT | 3 | °C/W | 8-Pin SOIC | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | the SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6. | 4 |
CAD (KiCad official)
- Symbol:
FAN3278TMX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fan3278tmx-etched.step/fan3278tmx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fan3278tmx.step/fan3278tmx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (17 pp, sha256
ffd506ec31423c3a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).