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CBM812TST4
Public Made by Adomby adom
Corebai Microelectronics Supervisor And Reset ICs, SOT-143-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCBM812TST4
Corebai Microelectronics · Supervisor And Reset ICs · SOT-143-4
CBM812TST4 from Corebai Microelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power supply ground, 0 V reference for the device. |
| 2 | RESET | output | For the CBM812 this is the active-high reset output: it is asserted when VCC is below the reset threshold and stays active for 240 ms (typical) after VCC rises above the threshold. |
| 3 | MR | input | Manual reset input with debounce; input pulses shorter than 100 ns are ignored, and inputs longer than 10 µs reliably trigger reset, with an internal pull-up of 10 kΩ to 30 kΩ (20 kΩ typical). |
| 4 | VCC | power_in | Supply voltage monitored by the device; operating supply range is 1.0 V to 5.5 V, and the absolute maximum is -0.3 V to +6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOT-143-4 |
| Category | Power Management (PMIC) |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VCC) | VCC | 1 | 5.5 | V | 5 | ||
| Supply current | 8 | 15 | μA | 5 | |||
| Reset threshold voltage, CBM812T (first row) | 3.03 | 3.08 | 3.14 | V | TA = −40°C to +85°C | 5 | |
| Reset threshold voltage, CBM812T (second row) | 3 | 3.15 | V | TA = −40°C to +85°C | 5 | ||
| Manual reset minimum pulse width | 10 | μs | 5 | ||||
| Manual reset pull-up resistor | 10 | 20 | 30 | kΩ | 5 | ||
| Power-on reset timeout (minimum) | 140 | ms | 1 | ||||
| Power-on reset timeout (typical) | 240 | ms | 8 | ||||
| Manual reset input high threshold | 2.3 | V | 5 | ||||
| Manual reset input low threshold | 0.8 | V | 5 | ||||
| Operating temperature range | -40 | 85 | °C | 4 | |||
| Storage temperature range | -65 | 160 | °C | 4 | |||
| VCC terminal voltage (relative to GND) | VCC | -0.3 | 6 | V | 4 | ||
| VCC input current | VCC | 20 | mA | 4 | |||
| MR input current | MR | 20 | mA | 4 | |||
| RESET output current | RESET | 20 | mA | 4 | |||
| Power dissipation (SOT-143) | 200 | mW | TA = 70°C | 4 | |||
| Thermal resistance junction-to-ambient | θJA | 330 | °C/W | 4 | |||
| Power derating above 70°C | 4 | mW/°C | above 70°C | 4 | |||
| ESD rating | 3 | kV | 4 | ||||
| Pin temperature, soldering (10 s) | 300 | °C | 10 s | 4 | |||
| Pin temperature, vapor phase (60 s) | 215 | °C | 60 s | 4 | |||
| Pin temperature, infrared (15 s) | 220 | °C | 15 s | 4 |
CAD (KiCad official)
- Symbol:
CBM812TST4 - Footprint:
Package_TO_SOT_SMD:SOT-143 - 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files:
cbm812tst4-etched.step/cbm812tst4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cbm812tst4.step/cbm812tst4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Corebai Microelectronics datasheet (10 pp, sha256
ffb063a0b60fd624, retrieved 2026-10-20, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).