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74HC04DRG

HANSCHIP semiconductor · Inverters · SOP-14

74HC04DRG from HANSCHIP semiconductor, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of inverter 1; input voltage range is 0 to VCC under the recommended operating conditions.
2 1Y output Output of inverter 1, the logical inverse of 1A (L input gives H output, H input gives L output).
3 2A input Data input of inverter 2; input voltage range is 0 to VCC under the recommended operating conditions.
4 2Y output Output of inverter 2, the logical inverse of 2A (L input gives H output, H input gives L output).
5 3A input Data input of inverter 3; input voltage range is 0 to VCC under the recommended operating conditions.
6 3Y output Output of inverter 3, the logical inverse of 3A (L input gives H output, H input gives L output).
7 GND power_in System ground, 0 V reference for all voltages.
8 4A input Data input of inverter 4; input voltage range is 0 to VCC under the recommended operating conditions.
9 4Y output Output of inverter 4, the logical inverse of 4A (L input gives H output, H input gives L output).
10 5A input Data input of inverter 5; input voltage range is 0 to VCC under the recommended operating conditions.
11 5Y output Output of inverter 5, the logical inverse of 5A (L input gives H output, H input gives L output).
12 6A input Data input of inverter 6; input voltage range is 0 to VCC under the recommended operating conditions.
13 6Y output Output of inverter 6, the logical inverse of 6A (L input gives H output, H input gives L output).
14 VCC power_in Positive supply; recommended supply range is 2.0 V to 6.0 V.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 3
Diode input current Ilk -20 20 mA Vi<-0.5V or Vi> VCC +0.5V 3
Diode output current Iok -20 20 mA Vo <-0.5V or VO> VCC +0.5V 3
Output or sink current Io -25 25 mA -0.5V<Vo< VCC +0.5V 3
VCC or GND current Icc,IGND -50 50 mA 3
Storage temperature Tstg -65 150 °C 3
Power dissipation (SOP package) PD 500 mW Tamb=-40~85°C; SOP package 3
Soldering temperature (SOP package) TL 250 °C 10 s, SOP 3
Supply voltage VCC 2 5 6 V 3
Operating ambient temperature Tamb -40 25 85 ℃ 3
Input rise and fall time tr tf 1000 ns Vcc=2.0V 3
Input rise and fall time tr tf 6 500 ns Vcc=4.5V 3
Input rise and fall time tr tf 400 ns Vcc=6.0V 3
High-level input voltage VIH 1.5 1.2 V VCC=2.0V, Tamb=25°C 3
High-level input voltage VIH 3.15 2.4 V VCC=4.5V, Tamb=25°C 3
High-level input voltage VIH 4.2 3.2 V VCC=6.0V, Tamb=25°C 3
Low-level input voltage VIL 0.8 0.5 V VCC=2.0V, Tamb=25°C 3
Low-level input voltage VIL 2.1 1.35 V VCC=4.5V, Tamb=25°C 3
Low-level input voltage VIL 2.8 1.8 V VCC=6.0V, Tamb=25°C 3
High-level output voltage VOH 1.9 2 V VCC=2.0V IO=-20uA, Tamb=25°C 3
High-level output voltage VOH 4.4 4.5 V VCC=4.5V IO=-20uA, Tamb=25°C 3
High-level output voltage VOH 5.9 6 V VCC=4.5V IO=-4.0mA, Tamb=25°C 4
High-level output voltage VOH 3.84 4.32 V VCC=6.0V IO=-20uA, Tamb=25°C 4
High-level output voltage VOH 5.34 5.81 V VCC=6.0V IO=-5.2mA, Tamb=25°C 4
Low-level output voltage VOL 0.15 0.33 V VCC=6.0V IO=20uA, Tamb=25°C 4
Low-level output voltage VOL 0 0.1 V VCC=4.5V IO=4.0mA, Tamb=25°C 4
Low-level output voltage VOL 0.16 0.33 V VCC=6.0V IO=5.2mA, Tamb=25°C 4
Input leakage current ILI -1 1 uA VCC=6.0V, Vi=VCC or GND, Tamb=25°C 4
3-state output off-state current IOZ -5 5 uA VCC=6.0V, Vi=VIH or VIL, Vo=VCC or GND, Tamb=25°C 4
Quiescent supply current ICCQ 20 uA VCC=6.0V, Vi=VCC or GND, IO=0, Tamb=25°C 4
High-level input voltage VIH 1.5 V VCC=2.0V, Tamb=-40~85°C 4
High-level input voltage VIH 3.15 V VCC=4.5V, Tamb=-40~85°C 4
High-level input voltage VIH 4.2 V VCC=6.0V, Tamb=-40~85°C 4
Low-level input voltage VIL 0.5 V VCC=2.0V, Tamb=-40~85°C 4
Low-level input voltage VIL 1.35 V VCC=4.5V, Tamb=-40~85°C 4
Low-level input voltage VIL 1.8 V VCC=6.0V, Tamb=-40~85°C 4
High-level output voltage VOH 1.9 V VCC=2.0V IO=-20uA, Tamb=-40~85°C 4
High-level output voltage VOH 4.4 V VCC=4.5V IO=-20uA, Tamb=-40~85°C 4
High-level output voltage VOH 5.9 V VCC=6.0V IO=-20uA, Tamb=-40~85°C 4
High-level output voltage VOH 3.7 V VCC=4.5V IO=-4.0mA, Tamb=-40~85°C 4
High-level output voltage VOH 5.2 V VCC=6.0V IO=-5.2mA, Tamb=-40~85°C 4
Low-level output voltage VOL 0.1 V VCC=2.0V IO=20uA, Tamb=-40~85°C 4
Low-level output voltage VOL 0.4 V VCC=4.5V IO=4.0mA, Tamb=-40~85°C 4
3-state output off-state current IOZ -10 10 uA VCC=6.0V, Vi=VIH or VIL, Vo=VCC or GND, Tamb=-40~85°C 4
Quiescent supply current ICCQ 40 uA VCC=6.0V, Vi=VCC or GND, IO=0, Tamb=-40~85°C 4
nA to nY propagation delay tPHL/tPLH 25 85 ns VCC=2.0V, Tamb=25°C, CL=50pF 5
nA to nY propagation delay tPHL/tPLH 9 17 ns VCC=4.5V, Tamb=25°C, CL=50pF 5
nA to nY propagation delay tPHL/tPLH 7 14 ns VCC=6.0V, Tamb=25°C, CL=50pF 5
Output transition time tTHL/tTLH 19 75 ns VCC=2.0V, Tamb=25°C, CL=50pF 5
Output transition time tTHL/tTLH 7 15 ns VCC=4.5V, Tamb=25°C, CL=50pF 5
Output transition time tTHL/tTLH 6 13 ns VCC=6.0V, Tamb=25°C, CL=50pF 5
nA to nY propagation delay tPHL/tPLH 105 ns VCC=2.0V, Tamb=-40~85°C, CL=50pF 5
nA to nY propagation delay tPHL/tPLH 21 ns VCC=4.5V, Tamb=-40~85°C, CL=50pF 5
nA to nY propagation delay tPHL/tPLH 18 ns VCC=6.0V, Tamb=-40~85°C, CL=50pF 5
Output transition time tTHL/tTLH 85 ns VCC=2.0V, Tamb=-40~85°C, CL=50pF 5
Output transition time tTHL/tTLH 19 ns VCC=4.5V, Tamb=-40~85°C, CL=50pF 5
Output transition time tTHL/tTLH 16 ns VCC=6.0V, Tamb=-40~85°C, CL=50pF 5

CAD (KiCad official)

  • Symbol: 74HC04DRG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hc04drg-etched.step / 74hc04drg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc04drg.step / 74hc04drg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (8 pp, sha256 2d0a883e72697da6, retrieved 2026-10-28, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF