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LM25066APSQX
Public Made by Adomby adom
Texas Instruments Power Management Specialized - PMIC, WQFN-24-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM25066APSQX
Texas Instruments · Power Management Specialized - PMIC · WQFN-24-EP(4x5)
LM25066APSQX from Texas Instruments, in a WQFN-24-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADR2 | input | SMBus address line 2 is a tri-state input that must be connected to GND, VDD, or left floating. |
| 2 | ADR1 | input | SMBus address line 1 is a tri-state input that must be connected to GND, VDD, or left floating. |
| 3 | ADR0 | input | SMBus address line 0 is a tri-state input that must be connected to GND, VDD, or left floating. |
| 4 | VDD | power_out | Internal sub-regulator output providing a 4.5V bias rail, bypassed with 1 µF to GND, with a datasheet current limit of 45 mV-independent 25 to 45 mA (typ. 45 mA) and an operating range of 2.9V to 5.5V. |
| 5 | CL | input | Current-limit range select: tie to GND for a 25 mV current-limit threshold or to VDD for a 46 mV threshold. |
| 6 | CB | input | Circuit-breaker range select: tie to GND to set the breaker trip at 1.8x the current-limit threshold, or to VDD to set it at 3.6x. |
| 7 | FB | input | Power-good feedback input with a 1.167V rising threshold set by an external divider from the output; an internal 24 µA sink provides hysteresis. |
| 8 | RETRY | input | Power-up fault retry configuration: tie to GND for continuous automatic retry during faults, or to VDD to latch off after a fault. |
| 9 | TIMER | passive | External timing capacitor pin that sets the insertion delay, fault timeout, and restart timing. |
| 10 | PWR | passive | Resistor to this pin, together with the sense resistor RS, sets the maximum allowed power dissipation of the external pass MOSFET; the pin may float if power limiting is not used. |
| 11 | PGD | output | Open-drain power-good output that goes high when FB exceeds 1.167V and the input is within its UVLO/OVLO window; it may be pulled up to the output rail or another voltage and is rated to 17V off-state (20V transient). |
| 12 | OUT | input | Output sense connected to the output rail (MOSFET source), used to determine MOSFET VDS for power limiting and to monitor output voltage; rated -0.3V to 20V to GND. |
| 13 | GATE | output | Gate drive output for the external N-channel MOSFET, clamped internally to about 18.8V (typ.) and rated 20V maximum to GND. |
| 14 | SENSE | input | Current-sense input connected to the load side of the sense resistor RS; VIN and SENSE are rated -0.3V to 24V to GND and must stay within -0.3V to +0.3V of each other. |
| 15 | VIN | power_in | Positive supply input operating from 2.9V to 17V with a 24V transient rating; place a small ceramic bypass capacitor close to this pin. |
| 16 | UVLO/EN | input | Undervoltage lockout input with a 1.16V threshold and 23 µA hysteresis current set by an external divider from VIN, also usable as a remote shutdown/enable input. |
| 17 | OVLO | input | Overvoltage lockout input with a 1.16V threshold and 23 µA hysteresis current set by an external divider from VIN; tie to GND to disable the OVLO function. |
| 18 | GND | power_in | Circuit ground for the device. |
| 19 | SDA | bidirectional | SMBus/PMBus data line. |
| 20 | SCL | input | SMBus/PMBus clock line; the PMBus input thresholds are 0.8V (low) and 2.1V (high). |
| 21 | SMBA | output | SMBus alert line, active low, asserted for enabled warnings and faults. |
| 22 | VREF | power_in | Internal 2.73V reference (2.703V to 2.757V) used for ADC conversion, bypassed with 1 µF to GND; pulling this pin low resets the logic and erases the volatile memory. |
| 23 | DIODE | passive | Connect to the base and collector of a diode-connected NPN transistor (MMBT3904) for remote temperature sensing, with the emitter to GND; tie to GND if unused. |
| 24 | VAUX | input | Auxiliary voltage telemetry input with a full-scale input of 1.16V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x5) |
| Category | Power Supply Chip |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LM25066APSQX - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: WQFN-24-EP(4x5) (KiCad packages3D, STEP)
- 3D model files:
lm25066apsqx-etched.step/lm25066apsqx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm25066apsqx.step/lm25066apsqx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
31a7643b9adeeb90, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).