component
ATMEGA8A-PU
Public Made by Adomby adom
Microchip Tech ATMEL & AVR, DIP-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownATMEGA8A-PU
Microchip Tech · ATMEL & AVR · DIP-28-300mil
ATMEGA8A-PU from Microchip Tech, in a DIP-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC6/RESET | input | Reset input when the RSTDISBL fuse is unprogrammed: a low level longer than the minimum pulse length (Table 26-3) generates a reset, and shorter pulses are not guaranteed to reset; if RSTDISBL is programmed it is a normal I/O pin with electrical characteristics that differ from other Port C pins. |
| 2 | PD0/RXD | bidirectional | Port D bit 0 and USART receive data input, which is forced to input when the USART receiver is enabled while its pull-up can still be controlled by PORTD0. |
| 3 | PD1/TXD | bidirectional | Port D bit 1 and USART transmit data output, which is forced to output whenever the USART transmitter is enabled regardless of DDD1. |
| 4 | PD2/INT0 | bidirectional | Port D bit 2 and external interrupt source 0 input. |
| 5 | PD3/INT1 | bidirectional | Port D bit 3 and external interrupt source 1 input. |
| 6 | PD4/XCK/T0 | bidirectional | Port D bit 4, serving as USART external clock input/output (XCK) and Timer/Counter0 external counter input (T0). |
| 7 | VCC | power_in | Digital supply voltage, operating range 2.7 to 5.5 V per the Features list. |
| 8 | GND | power_in | Ground reference. |
| 9 | PB6/XTAL1/TOSC1 | bidirectional | Port B bit 6, used as input to the inverting oscillator amplifier (XTAL1) or external clock input depending on clock fuse settings, and as TOSC1 for Timer/Counter2 when asynchronous mode is enabled; when used as a clock pin it cannot be used as I/O. |
| 10 | PB7/XTAL2/TOSC2 | bidirectional | Port B bit 7, used as output of the inverting oscillator amplifier (XTAL2) or as TOSC2 for Timer/Counter2 when asynchronous mode is enabled; when used as a clock pin it cannot be used as I/O. |
| 11 | PD5/T1 | bidirectional | Port D bit 5, serving as external counter source input for Timer/Counter1 (T1). |
| 12 | PD6/AIN0 | bidirectional | Port D bit 6, serving as Analog Comparator positive input (AIN0); configure as input with internal pull-up off to avoid interference with the comparator. |
| 13 | PD7/AIN1 | bidirectional | Port D bit 7, serving as Analog Comparator negative input (AIN1); configure as input with internal pull-up off to avoid interference with the comparator. |
| 14 | PB0/ICP1 | bidirectional | Port B bit 0, serving as Input Capture pin for Timer/Counter1. |
| 15 | PB1/OC1A | bidirectional | Port B bit 1, serving as Timer/Counter1 Output Compare A output; the pin must be configured as an output (DDB1 set) to perform this function. |
| 16 | PB2/SS/OC1B | bidirectional | Port B bit 2, serving as SPI Slave Select input (SS, active low when SPI is a slave) and Timer/Counter1 Output Compare B output (OC1B); as an output it must be configured with DDB2 set. |
| 17 | PB3/MOSI/OC2 | bidirectional | Port B bit 3, serving as SPI master data output or slave data input (MOSI) and Timer/Counter2 Output Compare Match output (OC2); as OC2 it must be configured as an output (DDB3 set). |
| 18 | PB4/MISO | bidirectional | Port B bit 4, serving as SPI master data input or slave data output (MISO). |
| 19 | PB5/SCK | bidirectional | Port B bit 5, serving as SPI master clock output or slave clock input (SCK). |
| 20 | AVCC | power_in | Supply voltage pin for the A/D converter, Port C (3:0) and ADC; it should be externally connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 21 | AREF | input | Analog reference pin for the A/D converter. |
| 22 | GND | power_in | Ground reference. |
| 23 | PC0/ADC0 | bidirectional | Port C bit 0 (7-bit bidirectional I/O with internal pull-ups per bit), also ADC input channel 0 using analog power. |
| 24 | PC1/ADC1 | bidirectional | Port C bit 1, also ADC input channel 1 using analog power. |
| 25 | PC2/ADC2 | bidirectional | Port C bit 2, also ADC input channel 2 using analog power. |
| 26 | PC3/ADC3 | bidirectional | Port C bit 3, also ADC input channel 3 using analog power. |
| 27 | PC4/SDA/ADC4 | bidirectional | Port C bit 4, serving as Two-wire Serial Interface data I/O (SDA) when TWEN is set and as ADC input channel 4, which uses digital power. |
| 28 | PC5/SCL/ADC5 | bidirectional | Port C bit 5, serving as Two-wire Serial Interface clock I/O (SCL) when TWEN is set and as ADC input channel 5, which uses digital power. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | DIP-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | -55 | 125 | °C | 232 | |||
| Storage Temperature | -65 | 150 | °C | 232 | |||
| Voltage on any pin except RESET with respect to Ground | -0.5 | V | 232 | ||||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | 232 | |||
| Maximum Operating Voltage | 6 | V | 232 | ||||
| DC Current per I/O Pin | 40 | mA | 232 | ||||
| DC Current VCC and GND Pins | 300 | mA | 232 | ||||
| Supply Voltage (16 MHz speed grade) | VCC | 2.7 | 5.5 | V | 16 MHz speed grade, ATmega8A-PU (Industrial) | 313 | |
| Operating Temperature (Industrial) | -40 | 85 | °C | ATmega8A-PU, Industrial range | 313 | ||
| Minimum VCC for Power-down | 2.5 | V | Power-down mode | 233 | |||
| Input Low Voltage, except XTAL1 and RESET pins | VIL | -0.5 | V | VCC = 2.7V - 5.5V | 232 | ||
| Input Low Voltage, XTAL1 pin | VIL1 | -0.5 | V | VCC = 2.7V - 5.5V | 232 | ||
| Input Low Voltage, RESET pin | VIL2 | -0.5 | V | VCC = 2.7V - 5.5V | 232 | ||
| Input Low Voltage, RESET pin as I/O | VIL3 | -0.5 | V | VCC = 2.7V - 5.5V | 232 | ||
| Output Low Voltage (Ports B,C,D) | VOL | 0.9 | V | IOL = 20mA, VCC = 5V | 232 | ||
| Output Low Voltage (Ports B,C,D) | VOL | 0.6 | V | IOL = 10mA, VCC = 3V | 232 | ||
| Output High Voltage (Ports B,C,D) | VOH | 4.2 | V | IOH = -20mA, VCC = 5V | 232 | ||
| Output High Voltage (Ports B,C,D) | VOH | 2.2 | V | IOH = -10mA, VCC = 3V | 232 | ||
| Input Leakage Current I/O Pin (pin low) | IIL | 1 | µA | Vcc = 5.5V, pin low (absolute value) | 232 | ||
| Input Leakage Current I/O Pin (pin high) | IIH | 1 | µA | Vcc = 5.5V, pin high (absolute value) | 232 | ||
| Reset Pull-up Resistor | RRST | 30 | 80 | k | 233 | ||
| I/O Pin Pull-up Resistor | Rpu | 20 | 50 | k | 233 | ||
| Power Supply Current, Active | ICC | 2 | 5 | mA | Active 4MHz, VCC = 3V | 233 | |
| Power Supply Current, Active | ICC | 6 | 15 | mA | Active 8MHz, VCC = 5V | 233 | |
| Power Supply Current, Idle | ICC | 0.5 | 2 | mA | Idle 4MHz, VCC = 3V | 233 | |
| Power Supply Current, Idle | ICC | 2.2 | 7 | mA | Idle 8MHz, VCC = 5V | 233 | |
| Power Supply Current, Power-down | ICC | 28 | µA | Power-down mode, WDT enabled, VCC = 3V | 233 | ||
| Power Supply Current, Power-down | ICC | 3 | µA | Power-down mode, WDT disabled, VCC = 3V | 233 | ||
| Analog Comparator Input Offset Voltage | VACIO | 40 | mV | VCC = 5V, Vin = VCC/2 | 233 | ||
| Analog Comparator Input Leakage Current | IACLK | -50 | 50 | nA | VCC = 5V, Vin = VCC/2 | 233 | |
| Analog Comparator Propagation Delay | tACPD | 750 | ns | VCC = 2.7V | 233 | ||
| Analog Comparator Propagation Delay | tACPD | 500 | ns | VCC = 5.0V | 233 | ||
| Oscillator Frequency | 1/tCLCL | 0 | 8 | MHz | VCC = 2.7V to 5.5V | 234 | |
| Oscillator Frequency | 1/tCLCL | 0 | 16 | MHz | VCC = 4.5V to 5.5V | 234 | |
| Clock Period | tCLCL | 125 | ns | VCC = 2.7V to 5.5V | 234 | ||
| Clock Period | tCLCL | 62.5 | ns | VCC = 4.5V to 5.5V | 234 | ||
| High Time | tCHCX | 50 | ns | VCC = 2.7V to 5.5V | 234 | ||
| High Time | tCHCX | 25 | ns | VCC = 4.5V to 5.5V | 234 | ||
| Low Time | tCLCX | 50 | ns | VCC = 2.7V to 5.5V | 234 | ||
| Low Time | tCLCX | 25 | ns | VCC = 4.5V to 5.5V | 234 | ||
| Rise Time | tCLCH | 1.6 | µs | VCC = 2.7V to 5.5V | 234 | ||
| Rise Time | tCLCH | 0.5 | µs | VCC = 4.5V to 5.5V | 234 | ||
| Fall Time | tCHCL | 1.6 | µs | VCC = 2.7V to 5.5V | 234 | ||
| Fall Time | tCHCL | 0.5 | µs | VCC = 4.5V to 5.5V | 234 | ||
| Power-on Reset Threshold Voltage (rising) | VPOT | 1.4 | 2.3 | V | 235 | ||
| Power-on Reset Threshold Voltage (falling) | VPOT | 1.3 | 2.3 | V | 235 | ||
| RESET Pin Threshold Voltage | VRST | 0.2 | 0.9 | VCC | 235 | ||
| Minimum pulse width on RESET Pin | tRST | 1.5 | µs | 235 | |||
| Brown-out Reset Threshold Voltage | VBOT | 2.4 | 2.6 | 2.9 | V | BODLEVEL = 1 | 235 |
| Brown-out Reset Threshold Voltage | VBOT | 3.7 | 4 | 4.5 | V | BODLEVEL = 0 | 235 |
| Brown-out Detector hysteresis | VHYST | 130 | mV | 235 | |||
| Bandgap reference voltage | VBG | 1.15 | 1.23 | 1.35 | V | 235 | |
| Conversion Time | 13 | 260 | µs | Free Running Conversion | 239 | ||
| Clock Frequency | 50 | 1000 | kHz | 239 | |||
| Internal Voltage Reference | VINT | 2.3 | 2.56 | 2.8 | V | 239 | |
| Reference Voltage | VREF | 2 | V | 239 | |||
| Absolute accuracy | 1.75 | LSB | Single Ended Conversion, VREF = 4V, VCC = 4V, ADC clock = 200kHz | 239 | |||
| Absolute accuracy | 3 | LSB | Single Ended Conversion, VREF = 4V, VCC = 4V, ADC clock = 1MHz | 239 | |||
| Output Low-voltage | VOL | 0 | 0.4 | V | 3mA sink current | 236 | |
| SCL Clock Frequency | fSCL | 0 | 400 | kHz | fCK > max(16fSCL, 250kHz) | 236 |
CAD (KiCad official)
- Symbol:
ATMEGA8A-PU - Footprint:
Package_DIP:DIP-28_W7.62mm - 3D model: DIP-28-300mil (KiCad packages3D, STEP)
- 3D model files:
atmega8a-pu-etched.step/atmega8a-pu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega8a-pu.step/atmega8a-pu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (327 pp, sha256
e10f0e392857e034, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).