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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM8S105S6T3C

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)

STM8S105S6T3C from STMicroelectronics, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	bidirectional	Reset pin (main function reset) with I/O type and weak pull-up (wpu) as listed in the pin description table.
2	PA1/OSCIN	bidirectional	Port A1 I/O (slow O1 output, weak pull-up and floating input options, external interrupt) with alternate function resonator/crystal input OSCIN.
3	PA2/OSCOUT	bidirectional	Port A2 I/O (slow O1 output, weak pull-up and floating input options, external interrupt) with alternate function resonator/crystal output OSCOUT.
4	VSSIO_1	power_in	I/O ground.
5	VSS	power_in	Digital ground.
6	VCAP	passive	1.8 V regulator capacitor connection.
7	VDD	power_in	Digital power supply.
8	VDDIO_1	power_in	I/O power supply.
9	PA4	bidirectional	Port A4 I/O with high sink capability, fast/slow programmable output speed (O3), weak pull-up and floating input options, and external interrupt.
10	PA5	bidirectional	Port A5 I/O with high sink capability, fast/slow programmable output speed (O3), weak pull-up and floating input options, and external interrupt.
11	PA6	bidirectional	Port A6 I/O with high sink capability, fast/slow programmable output speed (O3), weak pull-up and floating input options, and external interrupt.
12	VDDA	power_in	Analog power supply.
13	VSSA	power_in	Analog ground.
14	PB7/AIN7	bidirectional	Port B7 I/O with analog input 7 for the ADC, slow O1 output, weak pull-up and floating input options, and external interrupt.
15	PB6/AIN6	bidirectional	Port B6 I/O with analog input 6 for the ADC, slow O1 output, weak pull-up and floating input options, and external interrupt.
16	PB5/AIN5/I2C_SDA	bidirectional	Port B5 I/O with analog input 5 for the ADC; alternate function I2C_SDA is available when option AFR6 is set.
17	PB4/AIN4/I2C_SCL	bidirectional	Port B4 I/O with analog input 4 for the ADC; alternate function I2C_SCL is available when option AFR6 is set.
18	PB3/AIN3/TIM1_ETR	bidirectional	Port B3 I/O with analog input 3 for the ADC; alternate function TIM1_ETR is available when option AFR5 is set.
19	PB2/AIN2/TIM1_CH3N	bidirectional	Port B2 I/O with analog input 2 for the ADC; alternate function TIM1_CH3N is available when option AFR5 is set.
20	PB1/AIN1/TIM1_CH2N	bidirectional	Port B1 I/O with analog input 1 for the ADC; alternate function TIM1_CH2N is available when option AFR5 is set.
21	PB0/AIN0/TIM1_CH1N	bidirectional	Port B0 I/O with analog input 0 for the ADC; alternate function TIM1_CH1N is available when option AFR5 is set.
22	PE6/AIN9	bidirectional	Port E6 I/O with analog input 9; in the 44-pin package AIN9 cannot be used in ADC scan mode.
23	PE5/SPI_NSS	bidirectional	Port E5 I/O with alternate function SPI master/slave select (NSS) and external interrupt.
24	PC1/TIM1_CH1/UART2_CK	bidirectional	Port C1 I/O with high sink capability and fast/slow programmable speed (O3); alternate functions are TIM1_CH1 and the UART2 synchronous clock UART2_CK.
25	PC2/TIM1_CH2	bidirectional	Port C2 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is TIM1_CH2.
26	PC3/TIM1_CH3	bidirectional	Port C3 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is TIM1_CH3.
27	PC5/SPI_SCK	bidirectional	Port C5 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is the SPI clock SPI_SCK.
28	VSSIO_2	power_in	I/O ground.
29	VDDIO_2	power_in	I/O power supply.
30	PC6/SPI_MOSI	bidirectional	Port C6 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is SPI master out / slave in (SPI_MOSI).
31	PC7/SPI_MISO	bidirectional	Port C7 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is SPI master in / slave out (SPI_MISO).
32	PG0	bidirectional	Port G0 I/O with slow O1 output, weak pull-up and floating input options, and external interrupt; no alternate function listed.
33	PG1	bidirectional	Port G1 I/O with slow O1 output, weak pull-up and floating input options, and external interrupt; no alternate function listed.
34	PE2/I2C_SDA	bidirectional	Port E2 I/O configured as a true open-drain pin (no P-buffer, weak pull-up or protection diode to VDD) carrying the I2C data line I2C_SDA.
35	PE1/I2C_SCL	bidirectional	Port E1 I/O configured as a true open-drain pin (no P-buffer, weak pull-up or protection diode to VDD) carrying the I2C clock line I2C_SCL.
36	PE0/CLK_CCO	bidirectional	Port E0 I/O with high sink capability and fast/slow programmable speed (O3); alternate function is the configurable clock output CLK_CCO.
37	PD0/TIM3_CH2/TIM1_BKIN/CLK_CCO	bidirectional	Port D0 I/O with high sink capability; alternate function TIM3_CH2 by default, with TIM1_BKIN (option AFR3) or CLK_CCO (option AFR2) after remapping, where AFR2 takes priority over AFR3.
38	PD1/SWIM	bidirectional	Port D1 I/O with high sink capability and fast/slow programmable speed (O4), used as the SWIM single-wire debug data interface; the pin is input pull-up during reset and after internal reset release.
39	PD2/TIM3_CH1/TIM2_CH3	bidirectional	Port D2 I/O with high sink capability and fast/slow programmable speed (O3); alternate function TIM3_CH1 by default, with TIM2_CH3 available after option AFR1 remapping.
40	PD3/TIM2_CH2/ADC_ETR	bidirectional	Port D3 I/O with high sink capability and fast/slow programmable speed (O3); alternate function TIM2_CH2 by default, with ADC_ETR available after option AFR0 remapping.
41	PD4/TIM2_CH1/BEEP	bidirectional	Port D4 I/O with high sink capability and fast/slow programmable speed (O3); alternate function TIM2_CH1 by default, with the BEEP output available after option AFR7 remapping.
42	PD5/UART2_TX	bidirectional	Port D5 I/O with slow O1 output, weak pull-up and floating input options, and external interrupt; alternate function is the UART2 data transmit output UART2_TX.
43	PD6/UART2_RX	bidirectional	Port D6 I/O with slow O1 output, weak pull-up and floating input options, and external interrupt; alternate function is the UART2 data receive input UART2_RX.
44	PD7/TLI/TIM1_CH4	bidirectional	Port D7 I/O with slow O1 output, weak pull-up and floating input options, and external interrupt; alternate function is the top level interrupt input TLI, with TIM1_CH4 available after option AFR4 remapping.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-44(10x10)
Category	Embedded Processors & Controllers
Pins	44

CAD (KiCad official)

Symbol: STM8S105S6T3C
Footprint: Package_QFP:LQFP-44_10x10mm_P0.8mm
3D model: LQFP-44(10x10) (KiCad packages3D, STEP)
3D model files: stm8s105s6t3c-etched.step / stm8s105s6t3c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8s105s6t3c.step / stm8s105s6t3c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (121 pp, sha256 b1007bc27bb78327, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF